Search

Eric E. Silverman

Examiner (ID: 15411)

Most Active Art Unit
1618
Art Unit(s)
1618, 1615
Total Applications
298
Issued Applications
111
Pending Applications
2
Abandoned Applications
185

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4130873 [patent_doc_number] => 06121073 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-19 [patent_title] => 'Method for making a fuse structure for improved repaired yields on semiconductor memory devices' [patent_app_type] => 1 [patent_app_number] => 9/024479 [patent_app_country] => US [patent_app_date] => 1998-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4258 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 283 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/121/06121073.pdf [firstpage_image] =>[orig_patent_app_number] => 024479 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/024479
Method for making a fuse structure for improved repaired yields on semiconductor memory devices Feb 16, 1998 Issued
Array ( [id] => 4101896 [patent_doc_number] => 06100160 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-08 [patent_title] => 'Oxide etch barrier formed by nitridation' [patent_app_type] => 1 [patent_app_number] => 9/024809 [patent_app_country] => US [patent_app_date] => 1998-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 15 [patent_no_of_words] => 4181 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/100/06100160.pdf [firstpage_image] =>[orig_patent_app_number] => 024809 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/024809
Oxide etch barrier formed by nitridation Feb 16, 1998 Issued
Array ( [id] => 4145864 [patent_doc_number] => 06063686 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-16 [patent_title] => 'Method of manufacturing an improved SOI (silicon-on-insulator) semiconductor integrated circuit device' [patent_app_type] => 1 [patent_app_number] => 9/023489 [patent_app_country] => US [patent_app_date] => 1998-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 56 [patent_no_of_words] => 14157 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/063/06063686.pdf [firstpage_image] =>[orig_patent_app_number] => 023489 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/023489
Method of manufacturing an improved SOI (silicon-on-insulator) semiconductor integrated circuit device Feb 12, 1998 Issued
Array ( [id] => 4183792 [patent_doc_number] => 06159852 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-12 [patent_title] => 'Method of depositing polysilicon, method of fabricating a field effect transistor, method of forming a contact to a substrate, method of forming a capacitor' [patent_app_type] => 1 [patent_app_number] => 9/023239 [patent_app_country] => US [patent_app_date] => 1998-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 15 [patent_no_of_words] => 3513 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/159/06159852.pdf [firstpage_image] =>[orig_patent_app_number] => 023239 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/023239
Method of depositing polysilicon, method of fabricating a field effect transistor, method of forming a contact to a substrate, method of forming a capacitor Feb 12, 1998 Issued
Array ( [id] => 899304 [patent_doc_number] => RE040114 [patent_country] => US [patent_kind] => E1 [patent_issue_date] => 2008-02-26 [patent_title] => 'Tungsten silicide (WSIX) deposition process for semiconductor manufacture' [patent_app_type] => reissue [patent_app_number] => 09/023146 [patent_app_country] => US [patent_app_date] => 1998-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 1964 [patent_no_of_claims] => 47 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/RE/040/RE040114.pdf [firstpage_image] =>[orig_patent_app_number] => 09023146 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/023146
Tungsten silicide (WSIX) deposition process for semiconductor manufacture Feb 11, 1998 Issued
Array ( [id] => 4313082 [patent_doc_number] => 06242354 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-05 [patent_title] => 'Semiconductor device with self aligned contacts having integrated silicide stringer removal and method thereof' [patent_app_type] => 1 [patent_app_number] => 9/023027 [patent_app_country] => US [patent_app_date] => 1998-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 6096 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/242/06242354.pdf [firstpage_image] =>[orig_patent_app_number] => 023027 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/023027
Semiconductor device with self aligned contacts having integrated silicide stringer removal and method thereof Feb 11, 1998 Issued
Array ( [id] => 4003232 [patent_doc_number] => 06004878 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-21 [patent_title] => 'Method for silicide stringer removal in the fabrication of semiconductor integrated circuits' [patent_app_type] => 1 [patent_app_number] => 9/022597 [patent_app_country] => US [patent_app_date] => 1998-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4246 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/004/06004878.pdf [firstpage_image] =>[orig_patent_app_number] => 022597 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/022597
Method for silicide stringer removal in the fabrication of semiconductor integrated circuits Feb 11, 1998 Issued
Array ( [id] => 4097693 [patent_doc_number] => 06048759 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-11 [patent_title] => 'Gate/drain capacitance reduction for double gate-oxide DMOS without degrading avalanche breakdown' [patent_app_type] => 1 [patent_app_number] => 9/021879 [patent_app_country] => US [patent_app_date] => 1998-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 18 [patent_no_of_words] => 5767 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/048/06048759.pdf [firstpage_image] =>[orig_patent_app_number] => 021879 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/021879
Gate/drain capacitance reduction for double gate-oxide DMOS without degrading avalanche breakdown Feb 10, 1998 Issued
Array ( [id] => 4212391 [patent_doc_number] => 06028342 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-22 [patent_title] => 'ROM diode and a method of making the same' [patent_app_type] => 1 [patent_app_number] => 9/021837 [patent_app_country] => US [patent_app_date] => 1998-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 2629 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/028/06028342.pdf [firstpage_image] =>[orig_patent_app_number] => 021837 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/021837
ROM diode and a method of making the same Feb 10, 1998 Issued
Array ( [id] => 4410803 [patent_doc_number] => 06271572 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-07 [patent_title] => 'Multi-voltage level semiconductor device and its manufacture' [patent_app_type] => 1 [patent_app_number] => 9/021519 [patent_app_country] => US [patent_app_date] => 1998-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 19 [patent_no_of_words] => 5319 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/271/06271572.pdf [firstpage_image] =>[orig_patent_app_number] => 021519 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/021519
Multi-voltage level semiconductor device and its manufacture Feb 9, 1998 Issued
Array ( [id] => 4234838 [patent_doc_number] => 06165821 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-26 [patent_title] => 'P channel radhard device with boron diffused P-type polysilicon gate' [patent_app_type] => 1 [patent_app_number] => 9/020837 [patent_app_country] => US [patent_app_date] => 1998-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 3953 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/165/06165821.pdf [firstpage_image] =>[orig_patent_app_number] => 020837 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/020837
P channel radhard device with boron diffused P-type polysilicon gate Feb 8, 1998 Issued
Array ( [id] => 4029874 [patent_doc_number] => 05994213 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-30 [patent_title] => 'Aluminum plug process' [patent_app_type] => 1 [patent_app_number] => 9/020499 [patent_app_country] => US [patent_app_date] => 1998-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 1690 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/994/05994213.pdf [firstpage_image] =>[orig_patent_app_number] => 020499 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/020499
Aluminum plug process Feb 8, 1998 Issued
Array ( [id] => 4172487 [patent_doc_number] => 06083795 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-04 [patent_title] => 'Large angle channel threshold implant for improving reverse narrow width effect' [patent_app_type] => 1 [patent_app_number] => 9/020497 [patent_app_country] => US [patent_app_date] => 1998-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 3031 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/083/06083795.pdf [firstpage_image] =>[orig_patent_app_number] => 020497 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/020497
Large angle channel threshold implant for improving reverse narrow width effect Feb 8, 1998 Issued
Array ( [id] => 4276919 [patent_doc_number] => 06246085 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-12 [patent_title] => 'Semiconductor device having a through-hole of a two-level structure' [patent_app_type] => 1 [patent_app_number] => 9/019707 [patent_app_country] => US [patent_app_date] => 1998-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 2587 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/246/06246085.pdf [firstpage_image] =>[orig_patent_app_number] => 019707 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/019707
Semiconductor device having a through-hole of a two-level structure Feb 5, 1998 Issued
Array ( [id] => 4094789 [patent_doc_number] => 06096614 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-01 [patent_title] => 'Method to fabricate deep sub-.mu.m CMOSFETS' [patent_app_type] => 1 [patent_app_number] => 9/020229 [patent_app_country] => US [patent_app_date] => 1998-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 3045 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 287 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/096/06096614.pdf [firstpage_image] =>[orig_patent_app_number] => 020229 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/020229
Method to fabricate deep sub-.mu.m CMOSFETS Feb 5, 1998 Issued
Array ( [id] => 3990684 [patent_doc_number] => 05910701 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-08 [patent_title] => 'Field-emission cold cathode and manufacturing method for same' [patent_app_type] => 1 [patent_app_number] => 9/019469 [patent_app_country] => US [patent_app_date] => 1998-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 25 [patent_no_of_words] => 7253 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/910/05910701.pdf [firstpage_image] =>[orig_patent_app_number] => 019469 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/019469
Field-emission cold cathode and manufacturing method for same Feb 4, 1998 Issued
Array ( [id] => 4215288 [patent_doc_number] => 06087225 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-11 [patent_title] => 'Method for dual gate oxide dual workfunction CMOS' [patent_app_type] => 1 [patent_app_number] => 9/018939 [patent_app_country] => US [patent_app_date] => 1998-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2425 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/087/06087225.pdf [firstpage_image] =>[orig_patent_app_number] => 018939 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/018939
Method for dual gate oxide dual workfunction CMOS Feb 4, 1998 Issued
Array ( [id] => 4107321 [patent_doc_number] => 06057188 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-02 [patent_title] => 'Trench capacitor structures' [patent_app_type] => 1 [patent_app_number] => 9/019119 [patent_app_country] => US [patent_app_date] => 1998-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4016 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/057/06057188.pdf [firstpage_image] =>[orig_patent_app_number] => 019119 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/019119
Trench capacitor structures Feb 4, 1998 Issued
Array ( [id] => 4222796 [patent_doc_number] => 06111324 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-29 [patent_title] => 'Integrated carrier ring/stiffener and method for manufacturing a flexible integrated circuit package' [patent_app_type] => 1 [patent_app_number] => 9/020903 [patent_app_country] => US [patent_app_date] => 1998-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 2734 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/111/06111324.pdf [firstpage_image] =>[orig_patent_app_number] => 020903 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/020903
Integrated carrier ring/stiffener and method for manufacturing a flexible integrated circuit package Feb 4, 1998 Issued
Array ( [id] => 4009384 [patent_doc_number] => 05920785 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-06 [patent_title] => 'Dram cell and array to store two-bit data having merged stack capacitor and trench capacitor' [patent_app_type] => 1 [patent_app_number] => 9/018457 [patent_app_country] => US [patent_app_date] => 1998-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 7037 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 370 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/920/05920785.pdf [firstpage_image] =>[orig_patent_app_number] => 018457 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/018457
Dram cell and array to store two-bit data having merged stack capacitor and trench capacitor Feb 3, 1998 Issued
Menu