Search

Eric E. Silverman

Examiner (ID: 15411)

Most Active Art Unit
1618
Art Unit(s)
1618, 1615
Total Applications
298
Issued Applications
111
Pending Applications
2
Abandoned Applications
185

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4191077 [patent_doc_number] => 06043128 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-28 [patent_title] => 'Semiconductor device handling multi-level voltages' [patent_app_type] => 1 [patent_app_number] => 9/017417 [patent_app_country] => US [patent_app_date] => 1998-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 23 [patent_no_of_words] => 4059 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/043/06043128.pdf [firstpage_image] =>[orig_patent_app_number] => 017417 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/017417
Semiconductor device handling multi-level voltages Feb 1, 1998 Issued
Array ( [id] => 4136900 [patent_doc_number] => 06034396 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-07 [patent_title] => 'Ultra-short channel recessed gate MOSFET with a buried contact' [patent_app_type] => 1 [patent_app_number] => 9/014867 [patent_app_country] => US [patent_app_date] => 1998-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 4014 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/034/06034396.pdf [firstpage_image] =>[orig_patent_app_number] => 014867 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/014867
Ultra-short channel recessed gate MOSFET with a buried contact Jan 27, 1998 Issued
Array ( [id] => 4080810 [patent_doc_number] => 06054354 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-25 [patent_title] => 'High voltage field effect transistors with selective gate depletion' [patent_app_type] => 1 [patent_app_number] => 9/014889 [patent_app_country] => US [patent_app_date] => 1998-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2086 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/054/06054354.pdf [firstpage_image] =>[orig_patent_app_number] => 014889 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/014889
High voltage field effect transistors with selective gate depletion Jan 27, 1998 Issued
Array ( [id] => 4197878 [patent_doc_number] => 06013577 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-01-11 [patent_title] => 'Method of making an amorphous surface for a gate electrode during the fabrication of a semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/014467 [patent_app_country] => US [patent_app_date] => 1998-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 22 [patent_no_of_words] => 3057 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/013/06013577.pdf [firstpage_image] =>[orig_patent_app_number] => 014467 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/014467
Method of making an amorphous surface for a gate electrode during the fabrication of a semiconductor device Jan 27, 1998 Issued
Array ( [id] => 1435866 [patent_doc_number] => 06355509 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-12 [patent_title] => 'Removing a crystallization catalyst from a semiconductor film during semiconductor device fabrication' [patent_app_type] => B1 [patent_app_number] => 09/014639 [patent_app_country] => US [patent_app_date] => 1998-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 61 [patent_no_of_words] => 7812 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/355/06355509.pdf [firstpage_image] =>[orig_patent_app_number] => 09014639 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/014639
Removing a crystallization catalyst from a semiconductor film during semiconductor device fabrication Jan 27, 1998 Issued
Array ( [id] => 4242244 [patent_doc_number] => 06144047 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-07 [patent_title] => 'Semiconductor device having impurity concentrations for preventing a parasitic channel' [patent_app_type] => 1 [patent_app_number] => 9/014108 [patent_app_country] => US [patent_app_date] => 1998-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 18 [patent_no_of_words] => 4265 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/144/06144047.pdf [firstpage_image] =>[orig_patent_app_number] => 014108 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/014108
Semiconductor device having impurity concentrations for preventing a parasitic channel Jan 26, 1998 Issued
Array ( [id] => 4218787 [patent_doc_number] => 06040210 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-21 [patent_title] => '2F-square memory cell for gigabit memory applications' [patent_app_type] => 1 [patent_app_number] => 9/013509 [patent_app_country] => US [patent_app_date] => 1998-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 49 [patent_figures_cnt] => 72 [patent_no_of_words] => 20039 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/040/06040210.pdf [firstpage_image] =>[orig_patent_app_number] => 013509 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/013509
2F-square memory cell for gigabit memory applications Jan 25, 1998 Issued
Array ( [id] => 4153231 [patent_doc_number] => 06107153 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-22 [patent_title] => 'Method of forming a trench capacitor for a DRAM cell' [patent_app_type] => 1 [patent_app_number] => 9/013689 [patent_app_country] => US [patent_app_date] => 1998-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 1612 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/107/06107153.pdf [firstpage_image] =>[orig_patent_app_number] => 013689 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/013689
Method of forming a trench capacitor for a DRAM cell Jan 25, 1998 Issued
Array ( [id] => 3957065 [patent_doc_number] => 05930612 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-27 [patent_title] => 'Method of manufacturing complementary MOS semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/013669 [patent_app_country] => US [patent_app_date] => 1998-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 15 [patent_no_of_words] => 2974 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/930/05930612.pdf [firstpage_image] =>[orig_patent_app_number] => 013669 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/013669
Method of manufacturing complementary MOS semiconductor device Jan 25, 1998 Issued
Array ( [id] => 4329599 [patent_doc_number] => 06313036 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-06 [patent_title] => 'Method for producing semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/010927 [patent_app_country] => US [patent_app_date] => 1998-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 15 [patent_no_of_words] => 3094 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/313/06313036.pdf [firstpage_image] =>[orig_patent_app_number] => 010927 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/010927
Method for producing semiconductor device Jan 21, 1998 Issued
Array ( [id] => 4084505 [patent_doc_number] => 06025225 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-15 [patent_title] => 'Circuits with a trench capacitor having micro-roughened semiconductor surfaces and methods for forming the same' [patent_app_type] => 1 [patent_app_number] => 9/010729 [patent_app_country] => US [patent_app_date] => 1998-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4231 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/025/06025225.pdf [firstpage_image] =>[orig_patent_app_number] => 010729 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/010729
Circuits with a trench capacitor having micro-roughened semiconductor surfaces and methods for forming the same Jan 21, 1998 Issued
Array ( [id] => 3938800 [patent_doc_number] => 05939750 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-17 [patent_title] => 'Use of implanted ions to reduce oxide-nitride-oxide (ONO) etch residue and polystringers' [patent_app_type] => 1 [patent_app_number] => 9/009909 [patent_app_country] => US [patent_app_date] => 1998-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 22 [patent_no_of_words] => 6359 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/939/05939750.pdf [firstpage_image] =>[orig_patent_app_number] => 009909 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/009909
Use of implanted ions to reduce oxide-nitride-oxide (ONO) etch residue and polystringers Jan 20, 1998 Issued
Array ( [id] => 4094850 [patent_doc_number] => 06096618 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-01 [patent_title] => 'Method of making a Schottky diode with sub-minimum guard ring' [patent_app_type] => 1 [patent_app_number] => 9/009087 [patent_app_country] => US [patent_app_date] => 1998-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3803 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/096/06096618.pdf [firstpage_image] =>[orig_patent_app_number] => 009087 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/009087
Method of making a Schottky diode with sub-minimum guard ring Jan 19, 1998 Issued
Array ( [id] => 4029904 [patent_doc_number] => 05994215 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-30 [patent_title] => 'Method for suppression pattern distortion associated with BPSG reflow' [patent_app_type] => 1 [patent_app_number] => 9/009198 [patent_app_country] => US [patent_app_date] => 1998-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2118 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/994/05994215.pdf [firstpage_image] =>[orig_patent_app_number] => 009198 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/009198
Method for suppression pattern distortion associated with BPSG reflow Jan 19, 1998 Issued
08/913387 METALLISED UNDER-LAYER FOR (SOLDERING) FILLER MATERIALS Jan 19, 1998 Abandoned
Array ( [id] => 4309460 [patent_doc_number] => 06188101 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-13 [patent_title] => 'Flash EPROM cell with reduced short channel effect and method for providing same' [patent_app_type] => 1 [patent_app_number] => 9/006757 [patent_app_country] => US [patent_app_date] => 1998-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 1480 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/188/06188101.pdf [firstpage_image] =>[orig_patent_app_number] => 006757 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/006757
Flash EPROM cell with reduced short channel effect and method for providing same Jan 13, 1998 Issued
Array ( [id] => 6933419 [patent_doc_number] => 20010054763 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-12-27 [patent_title] => 'CONTACT ELECTRODE FOR N-TYPE GALLIUM NITRIDE-BASED COMPOUND SEMICONDUCTOR AND METHOD FOR FORMING THE SAME' [patent_app_type] => new [patent_app_number] => 09/006937 [patent_app_country] => US [patent_app_date] => 1998-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4828 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0054/20010054763.pdf [firstpage_image] =>[orig_patent_app_number] => 09006937 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/006937
Contact electrode for N-type gallium nitride-based compound semiconductor and method for forming the same Jan 13, 1998 Issued
Array ( [id] => 4086669 [patent_doc_number] => 06133077 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-17 [patent_title] => 'Formation of high-voltage and low-voltage devices on a semiconductor substrate' [patent_app_type] => 1 [patent_app_number] => 9/006918 [patent_app_country] => US [patent_app_date] => 1998-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 2884 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/133/06133077.pdf [firstpage_image] =>[orig_patent_app_number] => 006918 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/006918
Formation of high-voltage and low-voltage devices on a semiconductor substrate Jan 12, 1998 Issued
Array ( [id] => 4136517 [patent_doc_number] => 06015735 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-01-18 [patent_title] => 'Method for forming a multi-anchor DRAM capacitor and capacitor formed' [patent_app_type] => 1 [patent_app_number] => 9/006509 [patent_app_country] => US [patent_app_date] => 1998-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 4850 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/015/06015735.pdf [firstpage_image] =>[orig_patent_app_number] => 006509 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/006509
Method for forming a multi-anchor DRAM capacitor and capacitor formed Jan 12, 1998 Issued
Array ( [id] => 4407408 [patent_doc_number] => 06239001 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-29 [patent_title] => 'Method for making a semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/005739 [patent_app_country] => US [patent_app_date] => 1998-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 25 [patent_no_of_words] => 3020 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/239/06239001.pdf [firstpage_image] =>[orig_patent_app_number] => 005739 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/005739
Method for making a semiconductor device Jan 11, 1998 Issued
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