Eric E. Silverman

Array ( [id] => 1324040 [patent_doc_number] => 06602744 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-08-05 [patent_title] => 'Process for fabricating thin film semiconductor device' [patent_app_type] => B1 [patent_app_number] => 08/878588 [patent_app_country] => US [patent_app_date] => 1997-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 18 [patent_no_of_words] => 6232 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/602/06602744.pdf [firstpage_image] =>[orig_patent_app_number] => 08878588 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4114013 [patent_doc_number] => 06046093 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-04 [patent_title] => 'Method of forming capacitors and related integrated circuitry' [patent_app_type] => 1 [patent_app_number] => 8/876057 [patent_app_country] => US [patent_app_date] => 1997-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 4007 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 13 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/046/06046093.pdf [firstpage_image] =>[orig_patent_app_number] => 876057 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3957571 [patent_doc_number] => 05930642 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-27 [patent_title] => 'Transistor with buried insulative layer beneath the channel region' [patent_app_type] => 1 [patent_app_number] => 8/871468 [patent_app_country] => US [patent_app_date] => 1997-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 19 [patent_no_of_words] => 5943 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/930/05930642.pdf [firstpage_image] =>[orig_patent_app_number] => 871468 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4419941 [patent_doc_number] => 06225151 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-01 [patent_title] => 'Nitrogen liner beneath transistor source/drain regions to retard dopant diffusion' [patent_app_type] => 1 [patent_app_number] => 8/871469 [patent_app_country] => US [patent_app_date] => 1997-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 21 [patent_no_of_words] => 7555 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/225/06225151.pdf [firstpage_image] =>[orig_patent_app_number] => 871469 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1564972 [patent_doc_number] => 06339013 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-01-15 [patent_title] => 'Method of doping silicon, metal doped silicon, method of making solar cells, and solar cells' [patent_app_type] => B1 [patent_app_number] => 08/855229 [patent_app_country] => US [patent_app_date] => 1997-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 18 [patent_no_of_words] => 4234 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/339/06339013.pdf [firstpage_image] =>[orig_patent_app_number] => 08855229 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3944192 [patent_doc_number] => 05998263 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-07 [patent_title] => 'High-density nonvolatile memory cell' [patent_app_type] => 1 [patent_app_number] => 8/855808 [patent_app_country] => US [patent_app_date] => 1997-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 9216 [patent_no_of_claims] => 64 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/998/05998263.pdf [firstpage_image] =>[orig_patent_app_number] => 855808 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3927084 [patent_doc_number] => 05914531 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-22 [patent_title] => 'Semiconductor device having a ball grid array package structure using a supporting frame' [patent_app_type] => 1 [patent_app_number] => 8/805737 [patent_app_country] => US [patent_app_date] => 1997-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 41 [patent_figures_cnt] => 85 [patent_no_of_words] => 9667 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/914/05914531.pdf [firstpage_image] =>[orig_patent_app_number] => 805737 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4000535 [patent_doc_number] => 05858828 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-01-12 [patent_title] => 'Use of MEV implantation to form vertically modulated N+ buried layer in an NPN bipolar transistor' [patent_app_type] => 1 [patent_app_number] => 8/801668 [patent_app_country] => US [patent_app_date] => 1997-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 43 [patent_figures_cnt] => 75 [patent_no_of_words] => 4939 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/858/05858828.pdf [firstpage_image] =>[orig_patent_app_number] => 801668 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3933420 [patent_doc_number] => 05877555 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-02 [patent_title] => 'Direct contact die attach' [patent_app_type] => 1 [patent_app_number] => 8/771402 [patent_app_country] => US [patent_app_date] => 1996-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 2684 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/877/05877555.pdf [firstpage_image] =>[orig_patent_app_number] => 771402 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3968454 [patent_doc_number] => 05904493 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-05-18 [patent_title] => 'Active pixel sensor integrated with a pinned photodiode' [patent_app_type] => 1 [patent_app_number] => 8/771560 [patent_app_country] => US [patent_app_date] => 1996-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 1912 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/904/05904493.pdf [firstpage_image] =>[orig_patent_app_number] => 771560 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4050145 [patent_doc_number] => 05943553 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-24 [patent_title] => 'Applying semiconductor laser mirror layers after securing support plate to laser body' [patent_app_type] => 1 [patent_app_number] => 8/723831 [patent_app_country] => US [patent_app_date] => 1996-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 3162 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/943/05943553.pdf [firstpage_image] =>[orig_patent_app_number] => 723831 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3941734 [patent_doc_number] => 05989972 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-23 [patent_title] => 'Capacitor in a semiconductor configuration and process for its production' [patent_app_type] => 1 [patent_app_number] => 8/685847 [patent_app_country] => US [patent_app_date] => 1996-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 4792 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/989/05989972.pdf [firstpage_image] =>[orig_patent_app_number] => 685847 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 725671 [patent_doc_number] => 07045829 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-16 [patent_title] => 'Light-emitting semiconductor device using Group III nitride compound' [patent_app_type] => utility [patent_app_number] => 08/681412 [patent_app_country] => US [patent_app_date] => 1996-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3224 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/045/07045829.pdf [firstpage_image] =>[orig_patent_app_number] => 08681412 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1602580 [patent_doc_number] => 06432759 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-13 [patent_title] => 'Method of forming source and drain regions for CMOS devices' [patent_app_type] => B1 [patent_app_number] => 08/259575 [patent_app_country] => US [patent_app_date] => 1994-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 54 [patent_no_of_words] => 6371 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 334 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/432/06432759.pdf [firstpage_image] =>[orig_patent_app_number] => 08259575 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4030547 [patent_doc_number] => 05883406 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-16 [patent_title] => 'High-speed and high-density semiconductor memory' [patent_app_type] => 1 [patent_app_number] => 7/839704 [patent_app_country] => US [patent_app_date] => 1992-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 63 [patent_no_of_words] => 19379 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 308 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/883/05883406.pdf [firstpage_image] =>[orig_patent_app_number] => 839704 [rel_patent_id] =>[rel_patent_doc_number] =>)