Eric E. Silverman

Array ( [id] => 8994930 [patent_doc_number] => 08518814 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-08-27 [patent_title] => 'Methods of fabrication of high-density laser diode stacks' [patent_app_type] => utility [patent_app_number] => 13/310432 [patent_app_country] => US [patent_app_date] => 2011-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 5711 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13310432 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8495983 [patent_doc_number] => 20120295391 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-22 [patent_title] => 'METHOD OF MANUFACTURING A SOLAR CELL' [patent_app_type] => utility [patent_app_number] => 13/309870 [patent_app_country] => US [patent_app_date] => 2011-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5035 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13309870 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8265348 [patent_doc_number] => 20120164787 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-28 [patent_title] => 'VACUUM WAFER LEVEL PACKAGING METHOD FOR MICRO ELECTRO MECHANICAL SYSTEM DEVICE' [patent_app_type] => utility [patent_app_number] => 13/309582 [patent_app_country] => US [patent_app_date] => 2011-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1548 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13309582 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8853678 [patent_doc_number] => 20130143353 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-06 [patent_title] => 'PATTERNED IMPLANT OF A DIELECTRIC LAYER' [patent_app_type] => utility [patent_app_number] => 13/310318 [patent_app_country] => US [patent_app_date] => 2011-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4094 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13310318 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9344940 [patent_doc_number] => 08664087 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-03-04 [patent_title] => 'Method of manufacturing a semiconductor structure and separating the semiconductor from a substrate' [patent_app_type] => utility [patent_app_number] => 13/310342 [patent_app_country] => US [patent_app_date] => 2011-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 2836 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13310342 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8049373 [patent_doc_number] => 20120074425 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-29 [patent_title] => 'GROWTH OF REDUCED DISLOCATION DENSITY NON-POLAR GALLIUM NITRIDE' [patent_app_type] => utility [patent_app_number] => 13/309380 [patent_app_country] => US [patent_app_date] => 2011-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6400 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0074/20120074425.pdf [firstpage_image] =>[orig_patent_app_number] => 13309380 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8042387 [patent_doc_number] => 20120070919 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-22 [patent_title] => 'SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING THEREOF, AND METHOD OF MANUFACTURING BASE MATERIAL' [patent_app_type] => utility [patent_app_number] => 13/303519 [patent_app_country] => US [patent_app_date] => 2011-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 12499 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0070/20120070919.pdf [firstpage_image] =>[orig_patent_app_number] => 13303519 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9209555 [patent_doc_number] => 20140008732 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-09 [patent_title] => 'MACRO-TRANSISTOR DEVICES' [patent_app_type] => utility [patent_app_number] => 13/976081 [patent_app_country] => US [patent_app_date] => 2011-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8298 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13976081 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8538306 [patent_doc_number] => 08314027 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-11-20 [patent_title] => 'Wafer electroless plating system and associated methods' [patent_app_type] => utility [patent_app_number] => 13/284709 [patent_app_country] => US [patent_app_date] => 2011-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 10333 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13284709 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8749428 [patent_doc_number] => 08415261 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-04-09 [patent_title] => 'Capping before barrier-removal IC fabrication method' [patent_app_type] => utility [patent_app_number] => 13/270809 [patent_app_country] => US [patent_app_date] => 2011-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 9556 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13270809 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8701485 [patent_doc_number] => 08394706 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-12 [patent_title] => 'Printable semiconductor structures and related methods of making and assembling' [patent_app_type] => utility [patent_app_number] => 13/270954 [patent_app_country] => US [patent_app_date] => 2011-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 99 [patent_no_of_words] => 26661 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 251 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13270954 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8094925 [patent_doc_number] => 20120083068 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-05 [patent_title] => 'PHOTOVOLTAIC DEVICE AND METHOD FOR MAKING' [patent_app_type] => utility [patent_app_number] => 13/251851 [patent_app_country] => US [patent_app_date] => 2011-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7690 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0083/20120083068.pdf [firstpage_image] =>[orig_patent_app_number] => 13251851 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8094969 [patent_doc_number] => 20120083088 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-05 [patent_title] => 'INTEGRATED CIRCUIT DEVICE WITH WELL CONTROLLED SURFACE PROXIMITY AND METHOD OF MANUFACTURING SAME' [patent_app_type] => utility [patent_app_number] => 13/240025 [patent_app_country] => US [patent_app_date] => 2011-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 36 [patent_no_of_words] => 13293 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0083/20120083088.pdf [firstpage_image] =>[orig_patent_app_number] => 13240025 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7720416 [patent_doc_number] => 20120009751 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-12 [patent_title] => 'REDUCING CONTAMINATION IN A PROCESS FLOW OF FORMING A CHANNEL SEMICONDUCTOR ALLOY IN A SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/237265 [patent_app_country] => US [patent_app_date] => 2011-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8606 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0009/20120009751.pdf [firstpage_image] =>[orig_patent_app_number] => 13237265 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7720449 [patent_doc_number] => 20120009784 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-12 [patent_title] => 'METHOD FOR PROVIDING ELECTRICAL CONNECTIONS TO SPACED CONDUCTIVE LINES' [patent_app_type] => utility [patent_app_number] => 13/235939 [patent_app_country] => US [patent_app_date] => 2011-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 6552 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0009/20120009784.pdf [firstpage_image] =>[orig_patent_app_number] => 13235939 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8738726 [patent_doc_number] => 08410496 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-02 [patent_title] => 'Pulsed growth of catalyst-free growth of GaN nanowires and application in group III nitride semiconductor bulk material' [patent_app_type] => utility [patent_app_number] => 13/231559 [patent_app_country] => US [patent_app_date] => 2011-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 21 [patent_no_of_words] => 12489 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13231559 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7669630 [patent_doc_number] => 20110318899 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-29 [patent_title] => 'Methods of Forming Capacitors' [patent_app_type] => utility [patent_app_number] => 13/225034 [patent_app_country] => US [patent_app_date] => 2011-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2834 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13225034 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8153606 [patent_doc_number] => 20120097424 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-26 [patent_title] => 'METHOD FOR MANUFACTURIING TRANSPARENT ELECTRODE USING PRINT-BASED METAL WIRE AND TRANSPARENT ELECTRODE MANUFACTURED THEREBY' [patent_app_type] => utility [patent_app_number] => 13/223402 [patent_app_country] => US [patent_app_date] => 2011-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3780 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0097/20120097424.pdf [firstpage_image] =>[orig_patent_app_number] => 13223402 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7651426 [patent_doc_number] => 20110300695 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-08 [patent_title] => 'METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND SUBSTRATE PROCESSING APPARATUS' [patent_app_type] => utility [patent_app_number] => 13/213567 [patent_app_country] => US [patent_app_date] => 2011-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 23508 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0300/20110300695.pdf [firstpage_image] =>[orig_patent_app_number] => 13213567 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8458531 [patent_doc_number] => 08294201 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-23 [patent_title] => 'High-k gate dielectric and method of manufacture' [patent_app_type] => utility [patent_app_number] => 13/209493 [patent_app_country] => US [patent_app_date] => 2011-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 4130 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13209493 [rel_patent_id] =>[rel_patent_doc_number] =>)