Search

Eric E. Silverman

Examiner (ID: 15411)

Most Active Art Unit
1618
Art Unit(s)
1618, 1615
Total Applications
298
Issued Applications
111
Pending Applications
2
Abandoned Applications
185

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9995724 [patent_doc_number] => 09040318 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-05-26 [patent_title] => 'Lamination as a modular approach for building organic photosensitive devices' [patent_app_type] => utility [patent_app_number] => 13/083220 [patent_app_country] => US [patent_app_date] => 2011-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9692 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13083220 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/083220
Lamination as a modular approach for building organic photosensitive devices Apr 7, 2011 Issued
Array ( [id] => 5955811 [patent_doc_number] => 20110180863 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-07-28 [patent_title] => 'DRAM Unit Cells, Capacitors, Methods Of Forming DRAM Unit Cells, And Methods Of Forming Capacitors' [patent_app_type] => utility [patent_app_number] => 13/080489 [patent_app_country] => US [patent_app_date] => 2011-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 48 [patent_figures_cnt] => 48 [patent_no_of_words] => 8567 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0180/20110180863.pdf [firstpage_image] =>[orig_patent_app_number] => 13080489 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/080489
DRAM unit cells, capacitors, methods of forming DRAM unit cells, and methods of forming capacitors Apr 4, 2011 Issued
Array ( [id] => 9958622 [patent_doc_number] => 09006832 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-04-14 [patent_title] => 'High-voltage MEMS apparatus and method' [patent_app_type] => utility [patent_app_number] => 13/071374 [patent_app_country] => US [patent_app_date] => 2011-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6487 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 32 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13071374 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/071374
High-voltage MEMS apparatus and method Mar 23, 2011 Issued
Array ( [id] => 8244821 [patent_doc_number] => 08202743 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-06-19 [patent_title] => 'Light emitting device and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 13/049977 [patent_app_country] => US [patent_app_date] => 2011-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 16 [patent_no_of_words] => 10496 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/202/08202743.pdf [firstpage_image] =>[orig_patent_app_number] => 13049977 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/049977
Light emitting device and manufacturing method thereof Mar 16, 2011 Issued
Array ( [id] => 8375720 [patent_doc_number] => 08258525 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-09-04 [patent_title] => 'Light emitting device' [patent_app_type] => utility [patent_app_number] => 13/046520 [patent_app_country] => US [patent_app_date] => 2011-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 3787 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13046520 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/046520
Light emitting device Mar 10, 2011 Issued
Array ( [id] => 6075203 [patent_doc_number] => 20110140185 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-16 [patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND MANUFACTURE THEREOF' [patent_app_type] => utility [patent_app_number] => 13/032009 [patent_app_country] => US [patent_app_date] => 2011-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 39 [patent_no_of_words] => 29085 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0140/20110140185.pdf [firstpage_image] =>[orig_patent_app_number] => 13032009 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/032009
Semiconductor integrated circuit device Feb 21, 2011 Issued
Array ( [id] => 8139787 [patent_doc_number] => 20120094447 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-19 [patent_title] => 'METHOD FOR INTEGRATION OF DUAL METAL GATES AND DUAL HIGH-K DIELECTRICS IN CMOS DEVICES' [patent_app_type] => utility [patent_app_number] => 13/129743 [patent_app_country] => US [patent_app_date] => 2011-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 3229 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0094/20120094447.pdf [firstpage_image] =>[orig_patent_app_number] => 13129743 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/129743
Method for integration of dual metal gates and dual high-K dielectrics in CMOS devices Feb 20, 2011 Issued
Array ( [id] => 8502568 [patent_doc_number] => 20120301976 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-29 [patent_title] => 'METHOD FOR DESIGNING SOI WAFER AND METHOD FOR MANUFACTURING SOI WAFER' [patent_app_type] => utility [patent_app_number] => 13/577527 [patent_app_country] => US [patent_app_date] => 2011-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5981 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13577527 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/577527
METHOD FOR DESIGNING SOI WAFER AND METHOD FOR MANUFACTURING SOI WAFER Feb 2, 2011 Abandoned
Array ( [id] => 6162743 [patent_doc_number] => 20110193837 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-11 [patent_title] => 'SUBSTRATE FOR ELECTRO-OPTICAL DEVICES, ELECTRO-OPTICAL DEVICE AND ELECTRONIC APPARATUS' [patent_app_type] => utility [patent_app_number] => 13/014270 [patent_app_country] => US [patent_app_date] => 2011-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9311 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0193/20110193837.pdf [firstpage_image] =>[orig_patent_app_number] => 13014270 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/014270
SUBSTRATE FOR ELECTRO-OPTICAL DEVICES, ELECTRO-OPTICAL DEVICE AND ELECTRONIC APPARATUS Jan 25, 2011 Abandoned
Array ( [id] => 8410686 [patent_doc_number] => 08274083 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-09-25 [patent_title] => 'Semiconductor device and a method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 13/005728 [patent_app_country] => US [patent_app_date] => 2011-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 49 [patent_no_of_words] => 14119 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13005728 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/005728
Semiconductor device and a method of manufacturing the same Jan 12, 2011 Issued
Array ( [id] => 8103741 [patent_doc_number] => 08153519 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-04-10 [patent_title] => 'Method for fabricating semiconductor device using spacer patterning' [patent_app_type] => utility [patent_app_number] => 12/982123 [patent_app_country] => US [patent_app_date] => 2010-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 3274 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/153/08153519.pdf [firstpage_image] =>[orig_patent_app_number] => 12982123 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/982123
Method for fabricating semiconductor device using spacer patterning Dec 29, 2010 Issued
Array ( [id] => 8625120 [patent_doc_number] => 08357614 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-22 [patent_title] => 'Ruthenium-containing precursors for CVD and ALD' [patent_app_type] => utility [patent_app_number] => 12/981798 [patent_app_country] => US [patent_app_date] => 2010-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 4579 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12981798 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/981798
Ruthenium-containing precursors for CVD and ALD Dec 29, 2010 Issued
Array ( [id] => 8282836 [patent_doc_number] => 08216938 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-10 [patent_title] => 'Method for forming semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/982814 [patent_app_country] => US [patent_app_date] => 2010-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 23 [patent_no_of_words] => 8835 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12982814 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/982814
Method for forming semiconductor device Dec 29, 2010 Issued
Array ( [id] => 8277925 [patent_doc_number] => 20120171800 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-05 [patent_title] => 'METHOD OF SEALING AN ELECTRONIC DEVICE' [patent_app_type] => utility [patent_app_number] => 12/982249 [patent_app_country] => US [patent_app_date] => 2010-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1959 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12982249 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/982249
METHOD OF SEALING AN ELECTRONIC DEVICE Dec 29, 2010 Abandoned
Array ( [id] => 6047727 [patent_doc_number] => 20110207273 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-25 [patent_title] => 'Methods of Manufacturing Transistors' [patent_app_type] => utility [patent_app_number] => 12/980519 [patent_app_country] => US [patent_app_date] => 2010-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 10395 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0207/20110207273.pdf [firstpage_image] =>[orig_patent_app_number] => 12980519 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/980519
Methods of manufacturing CMOS transistors Dec 28, 2010 Issued
Array ( [id] => 8164181 [patent_doc_number] => 08173452 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-05-08 [patent_title] => 'Method to form a device by constructing a support element on a thin semiconductor lamina' [patent_app_type] => utility [patent_app_number] => 12/980424 [patent_app_country] => US [patent_app_date] => 2010-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 29 [patent_no_of_words] => 7777 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/173/08173452.pdf [firstpage_image] =>[orig_patent_app_number] => 12980424 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/980424
Method to form a device by constructing a support element on a thin semiconductor lamina Dec 28, 2010 Issued
Array ( [id] => 7729310 [patent_doc_number] => 08101437 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-01-24 [patent_title] => 'Method of forming three-terminal solar cell array' [patent_app_type] => utility [patent_app_number] => 12/981429 [patent_app_country] => US [patent_app_date] => 2010-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 1946 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 241 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/101/08101437.pdf [firstpage_image] =>[orig_patent_app_number] => 12981429 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/981429
Method of forming three-terminal solar cell array Dec 28, 2010 Issued
Array ( [id] => 7729339 [patent_doc_number] => 08101451 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-01-24 [patent_title] => 'Method to form a device including an annealed lamina and having amorphous silicon on opposing faces' [patent_app_type] => utility [patent_app_number] => 12/980427 [patent_app_country] => US [patent_app_date] => 2010-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 29 [patent_no_of_words] => 7716 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/101/08101451.pdf [firstpage_image] =>[orig_patent_app_number] => 12980427 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/980427
Method to form a device including an annealed lamina and having amorphous silicon on opposing faces Dec 28, 2010 Issued
Array ( [id] => 8221388 [patent_doc_number] => 20120135592 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-31 [patent_title] => 'METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/981118 [patent_app_country] => US [patent_app_date] => 2010-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4857 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12981118 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/981118
Method for manufacturing semiconductor device having multi-layered contact Dec 28, 2010 Issued
Array ( [id] => 7580371 [patent_doc_number] => 20110294254 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-01 [patent_title] => 'LOW COST SOLAR CELLS FORMED USING A CHALCOGENIZATION RATE MODIFIER' [patent_app_type] => utility [patent_app_number] => 12/980276 [patent_app_country] => US [patent_app_date] => 2010-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 36556 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0294/20110294254.pdf [firstpage_image] =>[orig_patent_app_number] => 12980276 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/980276
LOW COST SOLAR CELLS FORMED USING A CHALCOGENIZATION RATE MODIFIER Dec 27, 2010 Abandoned
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