
Eric E. Silverman
Examiner (ID: 15411)
| Most Active Art Unit | 1618 |
| Art Unit(s) | 1618, 1615 |
| Total Applications | 298 |
| Issued Applications | 111 |
| Pending Applications | 2 |
| Abandoned Applications | 185 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 7795819
[patent_doc_number] => 08124525
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2012-02-28
[patent_title] => 'Method of forming self-aligned local interconnect and structure formed thereby'
[patent_app_type] => utility
[patent_app_number] => 12/913143
[patent_app_country] => US
[patent_app_date] => 2010-10-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 5894
[patent_no_of_claims] => 25
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[patent_words_short_claim] => 83
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/124/08124525.pdf
[firstpage_image] =>[orig_patent_app_number] => 12913143
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/913143 | Method of forming self-aligned local interconnect and structure formed thereby | Oct 26, 2010 | Issued |
Array
(
[id] => 7965721
[patent_doc_number] => 07939377
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2011-05-10
[patent_title] => 'Method of manufacturing semiconductor element mounted wiring board'
[patent_app_type] => utility
[patent_app_number] => 12/913105
[patent_app_country] => US
[patent_app_date] => 2010-10-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/939/07939377.pdf
[firstpage_image] =>[orig_patent_app_number] => 12913105
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/913105 | Method of manufacturing semiconductor element mounted wiring board | Oct 26, 2010 | Issued |
Array
(
[id] => 4464040
[patent_doc_number] => 07935559
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2011-05-03
[patent_title] => 'Method for producing a non-planar microelectronic component using a cavity'
[patent_app_type] => utility
[patent_app_number] => 12/913289
[patent_app_country] => US
[patent_app_date] => 2010-10-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/935/07935559.pdf
[firstpage_image] =>[orig_patent_app_number] => 12913289
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/913289 | Method for producing a non-planar microelectronic component using a cavity | Oct 26, 2010 | Issued |
Array
(
[id] => 8172656
[patent_doc_number] => 20120108026
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-05-03
[patent_title] => 'METHOD OF MANUFACTURING STRAINED SOURCE/DRAIN STRUCTURES'
[patent_app_type] => utility
[patent_app_number] => 12/913041
[patent_app_country] => US
[patent_app_date] => 2010-10-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
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[patent_no_of_words] => 6863
[patent_no_of_claims] => 21
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[pdf_file] => publications/A1/0108/20120108026.pdf
[firstpage_image] =>[orig_patent_app_number] => 12913041
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/913041 | Method of manufacturing strained source/drain structures | Oct 26, 2010 | Issued |
Array
(
[id] => 4514101
[patent_doc_number] => 07910437
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2011-03-22
[patent_title] => 'Method of fabricating vertical channel semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 12/912558
[patent_app_country] => US
[patent_app_date] => 2010-10-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/910/07910437.pdf
[firstpage_image] =>[orig_patent_app_number] => 12912558
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/912558 | Method of fabricating vertical channel semiconductor device | Oct 25, 2010 | Issued |
Array
(
[id] => 5929436
[patent_doc_number] => 20110039395
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-02-17
[patent_title] => 'METHOD FOR MANUFACTURING SOI SUBSTRATE'
[patent_app_type] => utility
[patent_app_number] => 12/910320
[patent_app_country] => US
[patent_app_date] => 2010-10-22
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0039/20110039395.pdf
[firstpage_image] =>[orig_patent_app_number] => 12910320
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/910320 | Method for manufacturing SOI substrate | Oct 21, 2010 | Issued |
Array
(
[id] => 6055188
[patent_doc_number] => 20110111548
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-05-12
[patent_title] => 'METHOD OF MANUFACTURING A SOLAR CELL USING A PRE-CLEANING STEP THAT CONTRIBUTES TO HOMOGENEOUS TEXTURE MORPHOLOGY'
[patent_app_type] => utility
[patent_app_number] => 12/898374
[patent_app_country] => US
[patent_app_date] => 2010-10-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
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[patent_no_of_words] => 4276
[patent_no_of_claims] => 20
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0111/20110111548.pdf
[firstpage_image] =>[orig_patent_app_number] => 12898374
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/898374 | Method of manufacturing a solar cell using a pre-cleaning step that contributes to homogeneous texture morphology | Oct 4, 2010 | Issued |
Array
(
[id] => 7527882
[patent_doc_number] => 08044477
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2011-10-25
[patent_title] => 'Photovoltaic device and method for making'
[patent_app_type] => utility
[patent_app_number] => 12/894242
[patent_app_country] => US
[patent_app_date] => 2010-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_no_of_words] => 7664
[patent_no_of_claims] => 20
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[pdf_file] => patents/08/044/08044477.pdf
[firstpage_image] =>[orig_patent_app_number] => 12894242
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/894242 | Photovoltaic device and method for making | Sep 29, 2010 | Issued |
Array
(
[id] => 7738875
[patent_doc_number] => 20120018846
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-01-26
[patent_title] => 'Surge-Current-Resistant Semiconductor Diode With Soft Recovery Behavior and Methods for Producing a Semiconductor Diode'
[patent_app_type] => utility
[patent_app_number] => 12/894239
[patent_app_country] => US
[patent_app_date] => 2010-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 33
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[pdf_file] => publications/A1/0018/20120018846.pdf
[firstpage_image] =>[orig_patent_app_number] => 12894239
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/894239 | Surge-current-resistant semiconductor diode with soft recovery behavior and methods for producing a semiconductor diode | Sep 29, 2010 | Issued |
Array
(
[id] => 7656912
[patent_doc_number] => 20110306181
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-12-15
[patent_title] => 'METHOD OF MANUFACTURING SILICON CARBIDE SUBSTRATE'
[patent_app_type] => utility
[patent_app_number] => 13/202437
[patent_app_country] => US
[patent_app_date] => 2010-09-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[pdf_file] => publications/A1/0306/20110306181.pdf
[firstpage_image] =>[orig_patent_app_number] => 13202437
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/202437 | METHOD OF MANUFACTURING SILICON CARBIDE SUBSTRATE | Sep 27, 2010 | Abandoned |
Array
(
[id] => 8516337
[patent_doc_number] => 20120315745
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-12-13
[patent_title] => 'CRYSTALLINE SILICON FILM FORMING METHOD AND PLASMA CVD APPARATUS'
[patent_app_type] => utility
[patent_app_number] => 13/499150
[patent_app_country] => US
[patent_app_date] => 2010-09-28
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/499150 | CRYSTALLINE SILICON FILM FORMING METHOD AND PLASMA CVD APPARATUS | Sep 27, 2010 | Abandoned |
Array
(
[id] => 8909282
[patent_doc_number] => 08481345
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2013-07-09
[patent_title] => 'Method to determine the position-dependant metal correction factor for dose-rate equivalent laser testing of semiconductor devices'
[patent_app_type] => utility
[patent_app_number] => 12/891569
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/891569 | Method to determine the position-dependant metal correction factor for dose-rate equivalent laser testing of semiconductor devices | Sep 26, 2010 | Issued |
Array
(
[id] => 8185469
[patent_doc_number] => 20120115297
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-05-10
[patent_title] => 'METHOD FOR FABRICATING A TUNNELING FIELD-EFFECT TRANSISTOR'
[patent_app_type] => utility
[patent_app_number] => 13/133643
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[patent_app_date] => 2010-09-25
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[firstpage_image] =>[orig_patent_app_number] => 13133643
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/133643 | Method for fabricating a tunneling field-effect transistor | Sep 24, 2010 | Issued |
Array
(
[id] => 6032234
[patent_doc_number] => 20110081742
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-04-07
[patent_title] => 'TEXTURING SEMICONDUCTOR SUBSTRATES'
[patent_app_type] => utility
[patent_app_number] => 12/887873
[patent_app_country] => US
[patent_app_date] => 2010-09-22
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/887873 | Texturing semiconductor substrates | Sep 21, 2010 | Issued |
Array
(
[id] => 8375270
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[patent_issue_date] => 2012-09-04
[patent_title] => 'Method for manufacturing a metal gate electrode/high K dielectric gate stack'
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[patent_app_number] => 13/002079
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/002079 | Method for manufacturing a metal gate electrode/high K dielectric gate stack | Sep 20, 2010 | Issued |
Array
(
[id] => 7518859
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[patent_issue_date] => 2011-07-05
[patent_title] => 'Method for manufacturing thin film'
[patent_app_type] => utility
[patent_app_number] => 12/886240
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[firstpage_image] =>[orig_patent_app_number] => 12886240
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/886240 | Method for manufacturing thin film | Sep 19, 2010 | Issued |
Array
(
[id] => 7966009
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[patent_issue_date] => 2011-05-10
[patent_title] => 'Method and apparatus for uniform microwave treatment of semiconductor wafers'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/924004 | Method and apparatus for uniform microwave treatment of semiconductor wafers | Sep 16, 2010 | Issued |
Array
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[patent_title] => 'METHOD OF FABRICATING A SEMICONDUCTOR PACKAGE USING A FLUXING UNDERFILL COMPOSITION APPLIED TO SOLDER BALLS IN A DIP PROCESS'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/884405 | Method of fabricating a semiconductor package using a fluxing underfill composition applied to solder balls in a dip process | Sep 16, 2010 | Issued |
Array
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Array
(
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[patent_title] => 'Glass plate for display panels, process for producing it, and process for producing TFT panel'
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/883236 | Glass plate for display panels, process for producing it, and process for producing TFT panel | Sep 15, 2010 | Issued |