Search

Eric E. Silverman

Examiner (ID: 15411)

Most Active Art Unit
1618
Art Unit(s)
1618, 1615
Total Applications
298
Issued Applications
111
Pending Applications
2
Abandoned Applications
185

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 864721 [patent_doc_number] => 07368378 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-05-06 [patent_title] => 'Methods for making integrated-circuit wiring from copper, silver, gold, and other metals' [patent_app_type] => utility [patent_app_number] => 11/458975 [patent_app_country] => US [patent_app_date] => 2006-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 2850 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/368/07368378.pdf [firstpage_image] =>[orig_patent_app_number] => 11458975 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/458975
Methods for making integrated-circuit wiring from copper, silver, gold, and other metals Jul 19, 2006 Issued
Array ( [id] => 900956 [patent_doc_number] => 07339247 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-03-04 [patent_title] => 'Semiconductor device manufacturing method and semiconductor manufacturing apparatus' [patent_app_type] => utility [patent_app_number] => 11/488849 [patent_app_country] => US [patent_app_date] => 2006-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 3455 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/339/07339247.pdf [firstpage_image] =>[orig_patent_app_number] => 11488849 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/488849
Semiconductor device manufacturing method and semiconductor manufacturing apparatus Jul 18, 2006 Issued
Array ( [id] => 5730241 [patent_doc_number] => 20060255355 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-16 [patent_title] => 'Radiation emitting semiconductor component with luminescent conversion element' [patent_app_type] => utility [patent_app_number] => 11/487742 [patent_app_country] => US [patent_app_date] => 2006-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3881 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0255/20060255355.pdf [firstpage_image] =>[orig_patent_app_number] => 11487742 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/487742
Radiation emitting semiconductor component with luminescent conversion element Jul 16, 2006 Issued
Array ( [id] => 826851 [patent_doc_number] => 07402516 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-07-22 [patent_title] => 'Method for making integrated circuits' [patent_app_type] => utility [patent_app_number] => 11/457099 [patent_app_country] => US [patent_app_date] => 2006-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 3066 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/402/07402516.pdf [firstpage_image] =>[orig_patent_app_number] => 11457099 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/457099
Method for making integrated circuits Jul 11, 2006 Issued
Array ( [id] => 5602473 [patent_doc_number] => 20060292818 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-28 [patent_title] => 'Method for Making a Semiconductor Device Having a Semiconductor-on-Insulator (SOI) Configuration and Including a Superlattice on a Thin Semiconductor Layer' [patent_app_type] => utility [patent_app_number] => 11/428003 [patent_app_country] => US [patent_app_date] => 2006-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5108 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0292/20060292818.pdf [firstpage_image] =>[orig_patent_app_number] => 11428003 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/428003
Method for making a semiconductor device having a semiconductor-on-insulator (SOI) configuration and including a superlattice on a thin semiconductor layer Jun 29, 2006 Issued
Array ( [id] => 5916706 [patent_doc_number] => 20060237847 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-26 [patent_title] => 'INTEGRATED CIRCUIT INTERCONNECT' [patent_app_type] => utility [patent_app_number] => 11/427746 [patent_app_country] => US [patent_app_date] => 2006-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 2843 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0237/20060237847.pdf [firstpage_image] =>[orig_patent_app_number] => 11427746 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/427746
Integrated circuit interconnect Jun 28, 2006 Issued
Array ( [id] => 830466 [patent_doc_number] => 07400021 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-07-15 [patent_title] => 'Thin film optical detectors for retinal implantation and methods for making and using same' [patent_app_type] => utility [patent_app_number] => 11/475307 [patent_app_country] => US [patent_app_date] => 2006-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 23 [patent_no_of_words] => 10331 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/400/07400021.pdf [firstpage_image] =>[orig_patent_app_number] => 11475307 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/475307
Thin film optical detectors for retinal implantation and methods for making and using same Jun 26, 2006 Issued
Array ( [id] => 5196733 [patent_doc_number] => 20070296051 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-27 [patent_title] => 'Full frame ITO pixel with improved optical symmetry' [patent_app_type] => utility [patent_app_number] => 11/475463 [patent_app_country] => US [patent_app_date] => 2006-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1776 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0296/20070296051.pdf [firstpage_image] =>[orig_patent_app_number] => 11475463 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/475463
Full frame ITO pixel with improved optical symmetry Jun 26, 2006 Issued
Array ( [id] => 5848618 [patent_doc_number] => 20060231885 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-19 [patent_title] => 'Semiconductor device and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 11/455888 [patent_app_country] => US [patent_app_date] => 2006-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 9692 [patent_no_of_claims] => 49 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0231/20060231885.pdf [firstpage_image] =>[orig_patent_app_number] => 11455888 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/455888
Method of fabricating a semiconductor device Jun 19, 2006 Issued
Array ( [id] => 5230933 [patent_doc_number] => 20070293041 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-20 [patent_title] => 'SUB-LITHOGRAPHIC FEATURE PATTERNING USING SELF-ALIGNED SELF-ASSEMBLY POLYMERS' [patent_app_type] => utility [patent_app_number] => 11/424963 [patent_app_country] => US [patent_app_date] => 2006-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5684 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0293/20070293041.pdf [firstpage_image] =>[orig_patent_app_number] => 11424963 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/424963
Sub-lithographic feature patterning using self-aligned self-assembly polymers Jun 18, 2006 Issued
Array ( [id] => 5168812 [patent_doc_number] => 20070069243 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-29 [patent_title] => 'FORMING CLOSELY SPACED ELECTRODES' [patent_app_type] => utility [patent_app_number] => 11/424655 [patent_app_country] => US [patent_app_date] => 2006-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4162 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0069/20070069243.pdf [firstpage_image] =>[orig_patent_app_number] => 11424655 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/424655
Forming closely spaced electrodes Jun 15, 2006 Issued
Array ( [id] => 4775271 [patent_doc_number] => 20080283269 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-20 [patent_title] => 'Systems and methods for nanomaterial transfer' [patent_app_type] => utility [patent_app_number] => 11/454334 [patent_app_country] => US [patent_app_date] => 2006-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 9744 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0283/20080283269.pdf [firstpage_image] =>[orig_patent_app_number] => 11454334 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/454334
Systems and methods for nanomaterial transfer Jun 15, 2006 Issued
Array ( [id] => 8189023 [patent_doc_number] => 08183108 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-05-22 [patent_title] => 'Glass flux assisted sintering of chemical solution deposited thin dielectric films' [patent_app_type] => utility [patent_app_number] => 12/301791 [patent_app_country] => US [patent_app_date] => 2006-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 33 [patent_no_of_words] => 6853 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/183/08183108.pdf [firstpage_image] =>[orig_patent_app_number] => 12301791 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/301791
Glass flux assisted sintering of chemical solution deposited thin dielectric films Jun 14, 2006 Issued
Array ( [id] => 319063 [patent_doc_number] => 07521775 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-04-21 [patent_title] => 'Protection of three dimensional transistor structures during gate stack etch' [patent_app_type] => utility [patent_app_number] => 11/452883 [patent_app_country] => US [patent_app_date] => 2006-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 2914 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/521/07521775.pdf [firstpage_image] =>[orig_patent_app_number] => 11452883 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/452883
Protection of three dimensional transistor structures during gate stack etch Jun 12, 2006 Issued
Array ( [id] => 919672 [patent_doc_number] => 07320919 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-01-22 [patent_title] => 'Method for fabricating semiconductor device with metal-polycide gate and recessed channel' [patent_app_type] => utility [patent_app_number] => 11/450789 [patent_app_country] => US [patent_app_date] => 2006-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 17 [patent_no_of_words] => 2807 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/320/07320919.pdf [firstpage_image] =>[orig_patent_app_number] => 11450789 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/450789
Method for fabricating semiconductor device with metal-polycide gate and recessed channel Jun 8, 2006 Issued
Array ( [id] => 383041 [patent_doc_number] => 07306993 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-12-11 [patent_title] => 'Method for fabricating semiconductor device with recessed channel' [patent_app_type] => utility [patent_app_number] => 11/450764 [patent_app_country] => US [patent_app_date] => 2006-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 18 [patent_no_of_words] => 2948 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/306/07306993.pdf [firstpage_image] =>[orig_patent_app_number] => 11450764 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/450764
Method for fabricating semiconductor device with recessed channel Jun 8, 2006 Issued
Array ( [id] => 383064 [patent_doc_number] => 07307016 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-12-11 [patent_title] => 'Method of processing metal surface in dual damascene manufacturing' [patent_app_type] => utility [patent_app_number] => 11/448034 [patent_app_country] => US [patent_app_date] => 2006-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1574 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/307/07307016.pdf [firstpage_image] =>[orig_patent_app_number] => 11448034 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/448034
Method of processing metal surface in dual damascene manufacturing Jun 6, 2006 Issued
Array ( [id] => 373646 [patent_doc_number] => 07473950 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-01-06 [patent_title] => 'Nitrogenated carbon electrode for chalcogenide device and method of making same' [patent_app_type] => utility [patent_app_number] => 11/448184 [patent_app_country] => US [patent_app_date] => 2006-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 7431 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/473/07473950.pdf [firstpage_image] =>[orig_patent_app_number] => 11448184 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/448184
Nitrogenated carbon electrode for chalcogenide device and method of making same Jun 6, 2006 Issued
Array ( [id] => 852961 [patent_doc_number] => 07378345 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-05-27 [patent_title] => 'Metal electroplating process of an electrically connecting pad structure of circuit board and structure thereof' [patent_app_type] => utility [patent_app_number] => 11/447584 [patent_app_country] => US [patent_app_date] => 2006-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 2263 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/378/07378345.pdf [firstpage_image] =>[orig_patent_app_number] => 11447584 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/447584
Metal electroplating process of an electrically connecting pad structure of circuit board and structure thereof Jun 4, 2006 Issued
Array ( [id] => 5622973 [patent_doc_number] => 20060261478 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-23 [patent_title] => 'BARRIER LAYER STACK TO PREVENT TI DIFFUSION' [patent_app_type] => utility [patent_app_number] => 11/421773 [patent_app_country] => US [patent_app_date] => 2006-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3792 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0261/20060261478.pdf [firstpage_image] =>[orig_patent_app_number] => 11421773 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/421773
Barrier layer stack to prevent Ti diffusion Jun 1, 2006 Issued
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