Search

Eric E. Silverman

Examiner (ID: 15411)

Most Active Art Unit
1618
Art Unit(s)
1618, 1615
Total Applications
298
Issued Applications
111
Pending Applications
2
Abandoned Applications
185

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4472549 [patent_doc_number] => 07944063 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-05-17 [patent_title] => 'Application of 2-dimensional photonic crystals in alignment devices' [patent_app_type] => utility [patent_app_number] => 11/444532 [patent_app_country] => US [patent_app_date] => 2006-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 4982 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/944/07944063.pdf [firstpage_image] =>[orig_patent_app_number] => 11444532 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/444532
Application of 2-dimensional photonic crystals in alignment devices May 31, 2006 Issued
Array ( [id] => 74159 [patent_doc_number] => 07749899 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-07-06 [patent_title] => 'Microelectronic workpieces and methods and systems for forming interconnects in microelectronic workpieces' [patent_app_type] => utility [patent_app_number] => 11/446003 [patent_app_country] => US [patent_app_date] => 2006-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 16 [patent_no_of_words] => 5684 [patent_no_of_claims] => 55 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/749/07749899.pdf [firstpage_image] =>[orig_patent_app_number] => 11446003 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/446003
Microelectronic workpieces and methods and systems for forming interconnects in microelectronic workpieces May 31, 2006 Issued
Array ( [id] => 22293 [patent_doc_number] => 07799699 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-09-21 [patent_title] => 'Printable semiconductor structures and related methods of making and assembling' [patent_app_type] => utility [patent_app_number] => 11/421654 [patent_app_country] => US [patent_app_date] => 2006-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 100 [patent_no_of_words] => 26592 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/799/07799699.pdf [firstpage_image] =>[orig_patent_app_number] => 11421654 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/421654
Printable semiconductor structures and related methods of making and assembling May 31, 2006 Issued
Array ( [id] => 5250543 [patent_doc_number] => 20070131999 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-06-14 [patent_title] => 'Gated Diode Nonvolatile Memory Process' [patent_app_type] => utility [patent_app_number] => 11/421194 [patent_app_country] => US [patent_app_date] => 2006-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 9458 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0131/20070131999.pdf [firstpage_image] =>[orig_patent_app_number] => 11421194 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/421194
Gated diode nonvolatile memory process May 30, 2006 Issued
Array ( [id] => 5008094 [patent_doc_number] => 20070278571 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-06 [patent_title] => 'Planar split-gate high-performance MOSFET structure and manufacturing method' [patent_app_type] => utility [patent_app_number] => 11/444853 [patent_app_country] => US [patent_app_date] => 2006-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 5940 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0278/20070278571.pdf [firstpage_image] =>[orig_patent_app_number] => 11444853 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/444853
Planar split-gate high-performance MOSFET structure and manufacturing method May 30, 2006 Issued
Array ( [id] => 5088773 [patent_doc_number] => 20070228412 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-04 [patent_title] => 'Low voltage triggering silicon controlled rectifier and circuit thereof' [patent_app_type] => utility [patent_app_number] => 11/443963 [patent_app_country] => US [patent_app_date] => 2006-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3219 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0228/20070228412.pdf [firstpage_image] =>[orig_patent_app_number] => 11443963 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/443963
Low voltage triggering silicon controlled rectifier and circuit thereof May 29, 2006 Abandoned
Array ( [id] => 5191867 [patent_doc_number] => 20070080349 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-04-12 [patent_title] => 'Substrate for display device and liquid crystal display device having the same' [patent_app_type] => utility [patent_app_number] => 11/439994 [patent_app_country] => US [patent_app_date] => 2006-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 12286 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0080/20070080349.pdf [firstpage_image] =>[orig_patent_app_number] => 11439994 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/439994
Substrate for display device and liquid crystal display device having the same May 24, 2006 Issued
Array ( [id] => 5606255 [patent_doc_number] => 20060267771 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-30 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/440030 [patent_app_country] => US [patent_app_date] => 2006-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 9254 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0267/20060267771.pdf [firstpage_image] =>[orig_patent_app_number] => 11440030 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/440030
Semiconductor device including resonance circuit May 24, 2006 Issued
Array ( [id] => 813690 [patent_doc_number] => 07413962 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-08-19 [patent_title] => 'Method for forming sublithographic features during the manufacture of a semiconductor device and a resulting in-process apparatus' [patent_app_type] => utility [patent_app_number] => 11/440647 [patent_app_country] => US [patent_app_date] => 2006-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 21 [patent_no_of_words] => 4156 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/413/07413962.pdf [firstpage_image] =>[orig_patent_app_number] => 11440647 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/440647
Method for forming sublithographic features during the manufacture of a semiconductor device and a resulting in-process apparatus May 23, 2006 Issued
Array ( [id] => 5697531 [patent_doc_number] => 20060214215 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-28 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/434128 [patent_app_country] => US [patent_app_date] => 2006-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 9676 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0214/20060214215.pdf [firstpage_image] =>[orig_patent_app_number] => 11434128 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/434128
Semiconductor device having self-aligned gate pattern May 15, 2006 Issued
Array ( [id] => 568617 [patent_doc_number] => 07462570 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-12-09 [patent_title] => 'Method for forming high-resolution pattern and substrate having prepattern formed thereby' [patent_app_type] => utility [patent_app_number] => 11/431923 [patent_app_country] => US [patent_app_date] => 2006-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 6246 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/462/07462570.pdf [firstpage_image] =>[orig_patent_app_number] => 11431923 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/431923
Method for forming high-resolution pattern and substrate having prepattern formed thereby May 10, 2006 Issued
Array ( [id] => 5642878 [patent_doc_number] => 20060281333 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-14 [patent_title] => 'Method for forming high-resolution pattern with direct writing means' [patent_app_type] => utility [patent_app_number] => 11/431922 [patent_app_country] => US [patent_app_date] => 2006-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6719 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0281/20060281333.pdf [firstpage_image] =>[orig_patent_app_number] => 11431922 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/431922
Method for forming high-resolution pattern with direct writing means May 10, 2006 Issued
Array ( [id] => 5046168 [patent_doc_number] => 20070264841 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-15 [patent_title] => 'Photoresist stripping chamber and methods of etching photoresist on substrates' [patent_app_type] => utility [patent_app_number] => 11/431104 [patent_app_country] => US [patent_app_date] => 2006-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 6372 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0264/20070264841.pdf [firstpage_image] =>[orig_patent_app_number] => 11431104 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/431104
Photoresist stripping chamber and methods of etching photoresist on substrates May 9, 2006 Issued
Array ( [id] => 5780187 [patent_doc_number] => 20060202282 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-14 [patent_title] => 'Semiconductor device and a method of manufacturing the same and designing the same' [patent_app_type] => utility [patent_app_number] => 11/430983 [patent_app_country] => US [patent_app_date] => 2006-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 10740 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0202/20060202282.pdf [firstpage_image] =>[orig_patent_app_number] => 11430983 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/430983
Semiconductor device and a method of manufacturing the same and designing the same May 9, 2006 Issued
Array ( [id] => 5659143 [patent_doc_number] => 20060249739 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-09 [patent_title] => 'Multi-wavelength white light emitting diode' [patent_app_type] => utility [patent_app_number] => 11/416144 [patent_app_country] => US [patent_app_date] => 2006-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2417 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0249/20060249739.pdf [firstpage_image] =>[orig_patent_app_number] => 11416144 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/416144
Multi-wavelength white light emitting diode May 2, 2006 Abandoned
Array ( [id] => 5208259 [patent_doc_number] => 20070246843 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-25 [patent_title] => 'Pattern registration mark designs for use in photolithography and methods of using the same' [patent_app_type] => utility [patent_app_number] => 11/410424 [patent_app_country] => US [patent_app_date] => 2006-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6618 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0246/20070246843.pdf [firstpage_image] =>[orig_patent_app_number] => 11410424 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/410424
Pattern registration mark designs for use in photolithography and methods of using the same Apr 24, 2006 Issued
Array ( [id] => 5619636 [patent_doc_number] => 20060189170 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-24 [patent_title] => 'Plasma treatment apparatus and method for plasma treatment' [patent_app_type] => utility [patent_app_number] => 11/410234 [patent_app_country] => US [patent_app_date] => 2006-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6353 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0189/20060189170.pdf [firstpage_image] =>[orig_patent_app_number] => 11410234 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/410234
Plasma treatment apparatus and method for plasma treatment Apr 24, 2006 Issued
Array ( [id] => 5208246 [patent_doc_number] => 20070246830 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-25 [patent_title] => 'Long-lifetime interconnect structure and method for making' [patent_app_type] => utility [patent_app_number] => 11/408183 [patent_app_country] => US [patent_app_date] => 2006-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2144 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0246/20070246830.pdf [firstpage_image] =>[orig_patent_app_number] => 11408183 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/408183
Long-lifetime interconnect structure and method for making Apr 20, 2006 Abandoned
Array ( [id] => 5287485 [patent_doc_number] => 20090020215 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-22 [patent_title] => 'Optical Coatings With Narrow Conductive Lines' [patent_app_type] => utility [patent_app_number] => 11/918338 [patent_app_country] => US [patent_app_date] => 2006-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4716 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0020/20090020215.pdf [firstpage_image] =>[orig_patent_app_number] => 11918338 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/918338
Optical Coatings With Narrow Conductive Lines Apr 13, 2006 Abandoned
Array ( [id] => 5152093 [patent_doc_number] => 20070034975 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-15 [patent_title] => 'Nanotube semiconductor structures with varying electrical properties' [patent_app_type] => utility [patent_app_number] => 11/403694 [patent_app_country] => US [patent_app_date] => 2006-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3415 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0034/20070034975.pdf [firstpage_image] =>[orig_patent_app_number] => 11403694 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/403694
Nanotube semiconductor structures with varying electrical properties Apr 12, 2006 Issued
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