
Eric E. Silverman
Examiner (ID: 15411)
| Most Active Art Unit | 1618 |
| Art Unit(s) | 1618, 1615 |
| Total Applications | 298 |
| Issued Applications | 111 |
| Pending Applications | 2 |
| Abandoned Applications | 185 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4472549
[patent_doc_number] => 07944063
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-05-17
[patent_title] => 'Application of 2-dimensional photonic crystals in alignment devices'
[patent_app_type] => utility
[patent_app_number] => 11/444532
[patent_app_country] => US
[patent_app_date] => 2006-06-01
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/944/07944063.pdf
[firstpage_image] =>[orig_patent_app_number] => 11444532
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/444532 | Application of 2-dimensional photonic crystals in alignment devices | May 31, 2006 | Issued |
Array
(
[id] => 74159
[patent_doc_number] => 07749899
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-07-06
[patent_title] => 'Microelectronic workpieces and methods and systems for forming interconnects in microelectronic workpieces'
[patent_app_type] => utility
[patent_app_number] => 11/446003
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[patent_app_date] => 2006-06-01
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[pdf_file] => patents/07/749/07749899.pdf
[firstpage_image] =>[orig_patent_app_number] => 11446003
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/446003 | Microelectronic workpieces and methods and systems for forming interconnects in microelectronic workpieces | May 31, 2006 | Issued |
Array
(
[id] => 22293
[patent_doc_number] => 07799699
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-09-21
[patent_title] => 'Printable semiconductor structures and related methods of making and assembling'
[patent_app_type] => utility
[patent_app_number] => 11/421654
[patent_app_country] => US
[patent_app_date] => 2006-06-01
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[patent_drawing_sheets_cnt] => 25
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[pdf_file] => patents/07/799/07799699.pdf
[firstpage_image] =>[orig_patent_app_number] => 11421654
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/421654 | Printable semiconductor structures and related methods of making and assembling | May 31, 2006 | Issued |
Array
(
[id] => 5250543
[patent_doc_number] => 20070131999
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-06-14
[patent_title] => 'Gated Diode Nonvolatile Memory Process'
[patent_app_type] => utility
[patent_app_number] => 11/421194
[patent_app_country] => US
[patent_app_date] => 2006-05-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 30
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[pdf_file] => publications/A1/0131/20070131999.pdf
[firstpage_image] =>[orig_patent_app_number] => 11421194
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/421194 | Gated diode nonvolatile memory process | May 30, 2006 | Issued |
Array
(
[id] => 5008094
[patent_doc_number] => 20070278571
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-12-06
[patent_title] => 'Planar split-gate high-performance MOSFET structure and manufacturing method'
[patent_app_type] => utility
[patent_app_number] => 11/444853
[patent_app_country] => US
[patent_app_date] => 2006-05-31
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[pdf_file] => publications/A1/0278/20070278571.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/444853 | Planar split-gate high-performance MOSFET structure and manufacturing method | May 30, 2006 | Issued |
Array
(
[id] => 5088773
[patent_doc_number] => 20070228412
[patent_country] => US
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[patent_issue_date] => 2007-10-04
[patent_title] => 'Low voltage triggering silicon controlled rectifier and circuit thereof'
[patent_app_type] => utility
[patent_app_number] => 11/443963
[patent_app_country] => US
[patent_app_date] => 2006-05-30
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[firstpage_image] =>[orig_patent_app_number] => 11443963
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/443963 | Low voltage triggering silicon controlled rectifier and circuit thereof | May 29, 2006 | Abandoned |
Array
(
[id] => 5191867
[patent_doc_number] => 20070080349
[patent_country] => US
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[patent_issue_date] => 2007-04-12
[patent_title] => 'Substrate for display device and liquid crystal display device having the same'
[patent_app_type] => utility
[patent_app_number] => 11/439994
[patent_app_country] => US
[patent_app_date] => 2006-05-25
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[pdf_file] => publications/A1/0080/20070080349.pdf
[firstpage_image] =>[orig_patent_app_number] => 11439994
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/439994 | Substrate for display device and liquid crystal display device having the same | May 24, 2006 | Issued |
Array
(
[id] => 5606255
[patent_doc_number] => 20060267771
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[patent_kind] => A1
[patent_issue_date] => 2006-11-30
[patent_title] => 'Semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/440030
[patent_app_country] => US
[patent_app_date] => 2006-05-25
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[firstpage_image] =>[orig_patent_app_number] => 11440030
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/440030 | Semiconductor device including resonance circuit | May 24, 2006 | Issued |
Array
(
[id] => 813690
[patent_doc_number] => 07413962
[patent_country] => US
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[patent_issue_date] => 2008-08-19
[patent_title] => 'Method for forming sublithographic features during the manufacture of a semiconductor device and a resulting in-process apparatus'
[patent_app_type] => utility
[patent_app_number] => 11/440647
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[pdf_file] => patents/07/413/07413962.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/440647 | Method for forming sublithographic features during the manufacture of a semiconductor device and a resulting in-process apparatus | May 23, 2006 | Issued |
Array
(
[id] => 5697531
[patent_doc_number] => 20060214215
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[patent_issue_date] => 2006-09-28
[patent_title] => 'Semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/434128
[patent_app_country] => US
[patent_app_date] => 2006-05-16
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[firstpage_image] =>[orig_patent_app_number] => 11434128
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/434128 | Semiconductor device having self-aligned gate pattern | May 15, 2006 | Issued |
Array
(
[id] => 568617
[patent_doc_number] => 07462570
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-12-09
[patent_title] => 'Method for forming high-resolution pattern and substrate having prepattern formed thereby'
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[patent_app_number] => 11/431923
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[patent_app_date] => 2006-05-11
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/431923 | Method for forming high-resolution pattern and substrate having prepattern formed thereby | May 10, 2006 | Issued |
Array
(
[id] => 5642878
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[patent_title] => 'Method for forming high-resolution pattern with direct writing means'
[patent_app_type] => utility
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[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/431922 | Method for forming high-resolution pattern with direct writing means | May 10, 2006 | Issued |
Array
(
[id] => 5046168
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[patent_issue_date] => 2007-11-15
[patent_title] => 'Photoresist stripping chamber and methods of etching photoresist on substrates'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/431104 | Photoresist stripping chamber and methods of etching photoresist on substrates | May 9, 2006 | Issued |
Array
(
[id] => 5780187
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[patent_title] => 'Semiconductor device and a method of manufacturing the same and designing the same'
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Array
(
[id] => 5659143
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[patent_kind] => A1
[patent_issue_date] => 2006-11-09
[patent_title] => 'Multi-wavelength white light emitting diode'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/416144 | Multi-wavelength white light emitting diode | May 2, 2006 | Abandoned |
Array
(
[id] => 5208259
[patent_doc_number] => 20070246843
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[patent_issue_date] => 2007-10-25
[patent_title] => 'Pattern registration mark designs for use in photolithography and methods of using the same'
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Array
(
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[patent_title] => 'Plasma treatment apparatus and method for plasma treatment'
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Array
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Array
(
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/403694 | Nanotube semiconductor structures with varying electrical properties | Apr 12, 2006 | Issued |