Search

Eric E. Silverman

Examiner (ID: 15411)

Most Active Art Unit
1618
Art Unit(s)
1618, 1615
Total Applications
298
Issued Applications
111
Pending Applications
2
Abandoned Applications
185

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5913022 [patent_doc_number] => 20060128084 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-15 [patent_title] => 'Method of forming a gate pattern in a semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/292764 [patent_app_country] => US [patent_app_date] => 2005-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2770 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0128/20060128084.pdf [firstpage_image] =>[orig_patent_app_number] => 11292764 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/292764
Method of forming a gate pattern in a semiconductor device Dec 1, 2005 Issued
Array ( [id] => 5236668 [patent_doc_number] => 20070128825 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-06-07 [patent_title] => 'Method for bonding substrates and device for bonding substrates' [patent_app_type] => utility [patent_app_number] => 11/293663 [patent_app_country] => US [patent_app_date] => 2005-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6706 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0128/20070128825.pdf [firstpage_image] =>[orig_patent_app_number] => 11293663 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/293663
Method for bonding substrates and device for bonding substrates Dec 1, 2005 Issued
Array ( [id] => 856738 [patent_doc_number] => 07374997 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-05-20 [patent_title] => 'Method of manufacturing flash memory device' [patent_app_type] => utility [patent_app_number] => 11/292733 [patent_app_country] => US [patent_app_date] => 2005-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 3615 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/374/07374997.pdf [firstpage_image] =>[orig_patent_app_number] => 11292733 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/292733
Method of manufacturing flash memory device Dec 1, 2005 Issued
Array ( [id] => 4515211 [patent_doc_number] => 07932190 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-04-26 [patent_title] => 'Flow control of photo-polymerizable resin' [patent_app_type] => utility [patent_app_number] => 11/290055 [patent_app_country] => US [patent_app_date] => 2005-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 6504 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/932/07932190.pdf [firstpage_image] =>[orig_patent_app_number] => 11290055 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/290055
Flow control of photo-polymerizable resin Nov 29, 2005 Issued
Array ( [id] => 5814250 [patent_doc_number] => 20060084250 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-04-20 [patent_title] => 'Methods of making microelectronic packages with conductive elastomeric posts' [patent_app_type] => utility [patent_app_number] => 11/289743 [patent_app_country] => US [patent_app_date] => 2005-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3988 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0084/20060084250.pdf [firstpage_image] =>[orig_patent_app_number] => 11289743 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/289743
Methods of making microelectronic packages with conductive elastomeric posts Nov 28, 2005 Issued
Array ( [id] => 4893505 [patent_doc_number] => 20080102603 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-01 [patent_title] => 'Method for Producing Direct Bonded Wafer and Direct Bonded Wafer' [patent_app_type] => utility [patent_app_number] => 11/659283 [patent_app_country] => US [patent_app_date] => 2005-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5542 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0102/20080102603.pdf [firstpage_image] =>[orig_patent_app_number] => 11659283 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/659283
Method for producing direct bonded wafer and direct bonded wafer Nov 28, 2005 Issued
Array ( [id] => 5810785 [patent_doc_number] => 20060081893 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-04-20 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/287405 [patent_app_country] => US [patent_app_date] => 2005-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7003 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0081/20060081893.pdf [firstpage_image] =>[orig_patent_app_number] => 11287405 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/287405
Silicon composition in CMOS gates Nov 27, 2005 Issued
Array ( [id] => 581999 [patent_doc_number] => 07456506 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-11-25 [patent_title] => 'Radio frequency identification (RFID) tag lamination process using liner' [patent_app_type] => utility [patent_app_number] => 11/284761 [patent_app_country] => US [patent_app_date] => 2005-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2252 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/456/07456506.pdf [firstpage_image] =>[orig_patent_app_number] => 11284761 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/284761
Radio frequency identification (RFID) tag lamination process using liner Nov 21, 2005 Issued
Array ( [id] => 5713261 [patent_doc_number] => 20060076624 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-04-13 [patent_title] => 'Semiconductor substrate, method of manufacturing the same, semiconductor device, and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/282784 [patent_app_country] => US [patent_app_date] => 2005-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9148 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0076/20060076624.pdf [firstpage_image] =>[orig_patent_app_number] => 11282784 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/282784
Semiconductor substrate, method of manufacturing the same, semiconductor device, and method of manufacturing the same Nov 17, 2005 Issued
Array ( [id] => 504452 [patent_doc_number] => 07202103 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-04-10 [patent_title] => 'Overlapped color filter fabrication technique' [patent_app_type] => utility [patent_app_number] => 11/280323 [patent_app_country] => US [patent_app_date] => 2005-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 34 [patent_no_of_words] => 6599 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/202/07202103.pdf [firstpage_image] =>[orig_patent_app_number] => 11280323 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/280323
Overlapped color filter fabrication technique Nov 16, 2005 Issued
Array ( [id] => 5814226 [patent_doc_number] => 20060084240 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-04-20 [patent_title] => 'Apparatus and method for packaging circuits' [patent_app_type] => utility [patent_app_number] => 11/281084 [patent_app_country] => US [patent_app_date] => 2005-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5663 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0084/20060084240.pdf [firstpage_image] =>[orig_patent_app_number] => 11281084 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/281084
Method for fabricating packaged die Nov 16, 2005 Issued
Array ( [id] => 5754101 [patent_doc_number] => 20060223250 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-05 [patent_title] => 'Technique for forming a transistor having raised drain and source regions with a tri-layer hard mask for gate patterning' [patent_app_type] => utility [patent_app_number] => 11/280484 [patent_app_country] => US [patent_app_date] => 2005-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6880 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0223/20060223250.pdf [firstpage_image] =>[orig_patent_app_number] => 11280484 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/280484
Technique for forming a transistor having raised drain and source regions with a tri-layer hard mask for gate patterning Nov 15, 2005 Issued
Array ( [id] => 5747995 [patent_doc_number] => 20060110927 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-25 [patent_title] => 'Package for a semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/274433 [patent_app_country] => US [patent_app_date] => 2005-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2670 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0110/20060110927.pdf [firstpage_image] =>[orig_patent_app_number] => 11274433 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/274433
Package for a semiconductor device Nov 14, 2005 Issued
Array ( [id] => 925663 [patent_doc_number] => 07316961 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-01-08 [patent_title] => 'Method of manufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/273504 [patent_app_country] => US [patent_app_date] => 2005-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 15 [patent_no_of_words] => 5442 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/316/07316961.pdf [firstpage_image] =>[orig_patent_app_number] => 11273504 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/273504
Method of manufacturing semiconductor device Nov 13, 2005 Issued
Array ( [id] => 5637591 [patent_doc_number] => 20060068564 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-30 [patent_title] => 'Micromachined electromechanical device' [patent_app_type] => utility [patent_app_number] => 11/273827 [patent_app_country] => US [patent_app_date] => 2005-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4088 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0068/20060068564.pdf [firstpage_image] =>[orig_patent_app_number] => 11273827 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/273827
Micromachined electromechanical device Nov 13, 2005 Issued
Array ( [id] => 380068 [patent_doc_number] => 07309642 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-12-18 [patent_title] => 'Metallic quantum dots fabricated by a superlattice structure' [patent_app_type] => utility [patent_app_number] => 11/271354 [patent_app_country] => US [patent_app_date] => 2005-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 18 [patent_no_of_words] => 7049 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/309/07309642.pdf [firstpage_image] =>[orig_patent_app_number] => 11271354 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/271354
Metallic quantum dots fabricated by a superlattice structure Nov 8, 2005 Issued
Array ( [id] => 5652820 [patent_doc_number] => 20060138555 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-29 [patent_title] => 'Semiconductor device and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 11/269543 [patent_app_country] => US [patent_app_date] => 2005-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5348 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0138/20060138555.pdf [firstpage_image] =>[orig_patent_app_number] => 11269543 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/269543
Semiconductor device and method of fabricating semiconductor device using oxidation Nov 8, 2005 Issued
Array ( [id] => 7689336 [patent_doc_number] => 20070105362 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-10 [patent_title] => 'Methods of forming contact structures in low-k materials using dual damascene processes' [patent_app_type] => utility [patent_app_number] => 11/270783 [patent_app_country] => US [patent_app_date] => 2005-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 4422 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0105/20070105362.pdf [firstpage_image] =>[orig_patent_app_number] => 11270783 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/270783
Methods of forming contact structures in low-k materials using dual damascene processes Nov 8, 2005 Abandoned
Array ( [id] => 390259 [patent_doc_number] => 07300855 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-11-27 [patent_title] => 'Reversible oxidation protection of microcomponents' [patent_app_type] => utility [patent_app_number] => 11/270294 [patent_app_country] => US [patent_app_date] => 2005-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 3410 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/300/07300855.pdf [firstpage_image] =>[orig_patent_app_number] => 11270294 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/270294
Reversible oxidation protection of microcomponents Nov 8, 2005 Issued
Array ( [id] => 352538 [patent_doc_number] => 07491559 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-02-17 [patent_title] => 'Low-temperature polysilicon display and method for fabricating same' [patent_app_type] => utility [patent_app_number] => 11/270373 [patent_app_country] => US [patent_app_date] => 2005-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 1562 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/491/07491559.pdf [firstpage_image] =>[orig_patent_app_number] => 11270373 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/270373
Low-temperature polysilicon display and method for fabricating same Nov 7, 2005 Issued
Menu