Search

Eric E. Silverman

Examiner (ID: 15411)

Most Active Art Unit
1618
Art Unit(s)
1618, 1615
Total Applications
298
Issued Applications
111
Pending Applications
2
Abandoned Applications
185

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 895094 [patent_doc_number] => 07341925 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-03-11 [patent_title] => 'Method for transferring a semiconductor body from a growth substrate to a support material' [patent_app_type] => utility [patent_app_number] => 11/244802 [patent_app_country] => US [patent_app_date] => 2005-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 5020 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/341/07341925.pdf [firstpage_image] =>[orig_patent_app_number] => 11244802 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/244802
Method for transferring a semiconductor body from a growth substrate to a support material Oct 5, 2005 Issued
Array ( [id] => 5005090 [patent_doc_number] => 20070202660 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-30 [patent_title] => 'Method For Producing Mixed Stacked Structures, Different Insulating Areas And/Or Localised Vertical Electrical conducting Areas' [patent_app_type] => utility [patent_app_number] => 11/576743 [patent_app_country] => US [patent_app_date] => 2005-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 15484 [patent_no_of_claims] => 82 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0202/20070202660.pdf [firstpage_image] =>[orig_patent_app_number] => 11576743 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/576743
Method for producing mixed stacked structures, different insulating areas and/or localised vertical electrical conducting areas Oct 5, 2005 Issued
Array ( [id] => 232754 [patent_doc_number] => 07598179 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-10-06 [patent_title] => 'Techniques for removal of photolithographic films' [patent_app_type] => utility [patent_app_number] => 11/243883 [patent_app_country] => US [patent_app_date] => 2005-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 2251 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/598/07598179.pdf [firstpage_image] =>[orig_patent_app_number] => 11243883 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/243883
Techniques for removal of photolithographic films Oct 3, 2005 Issued
Array ( [id] => 877491 [patent_doc_number] => 07358580 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-04-15 [patent_title] => 'Sacrificial layer technique to make gaps in MEMS applications' [patent_app_type] => utility [patent_app_number] => 11/241024 [patent_app_country] => US [patent_app_date] => 2005-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 32 [patent_no_of_words] => 5582 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/358/07358580.pdf [firstpage_image] =>[orig_patent_app_number] => 11241024 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/241024
Sacrificial layer technique to make gaps in MEMS applications Sep 29, 2005 Issued
Array ( [id] => 5757685 [patent_doc_number] => 20060208630 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-21 [patent_title] => 'Deposition of permanent polymer structures for OLED fabrication' [patent_app_type] => utility [patent_app_number] => 11/240921 [patent_app_country] => US [patent_app_date] => 2005-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 15643 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0208/20060208630.pdf [firstpage_image] =>[orig_patent_app_number] => 11240921 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/240921
Deposition of permanent polymer structures for OLED fabrication Sep 29, 2005 Abandoned
Array ( [id] => 630397 [patent_doc_number] => 07132357 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-11-07 [patent_title] => 'Method for shielding printed circuit board circuits' [patent_app_type] => utility [patent_app_number] => 11/238894 [patent_app_country] => US [patent_app_date] => 2005-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 2432 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/132/07132357.pdf [firstpage_image] =>[orig_patent_app_number] => 11238894 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/238894
Method for shielding printed circuit board circuits Sep 28, 2005 Issued
Array ( [id] => 856703 [patent_doc_number] => 07374962 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-05-20 [patent_title] => 'Method of fabricating reflective spatial light modulator having high contrast ratio' [patent_app_type] => utility [patent_app_number] => 11/240303 [patent_app_country] => US [patent_app_date] => 2005-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 54 [patent_no_of_words] => 11886 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/374/07374962.pdf [firstpage_image] =>[orig_patent_app_number] => 11240303 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/240303
Method of fabricating reflective spatial light modulator having high contrast ratio Sep 28, 2005 Issued
Array ( [id] => 9823880 [patent_doc_number] => 08933366 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-01-13 [patent_title] => 'Micro laser assisted machining' [patent_app_type] => utility [patent_app_number] => 11/992811 [patent_app_country] => US [patent_app_date] => 2005-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 1739 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11992811 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/992811
Micro laser assisted machining Sep 27, 2005 Issued
Array ( [id] => 5985784 [patent_doc_number] => 20110097883 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-28 [patent_title] => 'REDUCTION OF SHEET RESISTANCE OF PHOSPHORUS IMPLANTED POLY-SILICON' [patent_app_type] => utility [patent_app_number] => 11/576344 [patent_app_country] => US [patent_app_date] => 2005-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 1873 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0097/20110097883.pdf [firstpage_image] =>[orig_patent_app_number] => 11576344 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/576344
Reduction of sheet resistance of phosphorus implanted poly-silicon Sep 27, 2005 Issued
Array ( [id] => 5171892 [patent_doc_number] => 20070072325 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-29 [patent_title] => 'Self-aligned photodiode for CMOS image sensor and method of making' [patent_app_type] => utility [patent_app_number] => 11/235823 [patent_app_country] => US [patent_app_date] => 2005-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2971 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0072/20070072325.pdf [firstpage_image] =>[orig_patent_app_number] => 11235823 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/235823
Self-aligned photodiode for CMOS image sensor and method of making Sep 26, 2005 Issued
Array ( [id] => 5768116 [patent_doc_number] => 20060019486 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-01-26 [patent_title] => 'Novel film for copper diffusion barrier' [patent_app_type] => utility [patent_app_number] => 11/234808 [patent_app_country] => US [patent_app_date] => 2005-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3230 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0019/20060019486.pdf [firstpage_image] =>[orig_patent_app_number] => 11234808 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/234808
Film for copper diffusion barrier Sep 22, 2005 Issued
Array ( [id] => 5768046 [patent_doc_number] => 20060019448 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-01-26 [patent_title] => 'Termination for trench MIS device having implanted drain-drift region' [patent_app_type] => utility [patent_app_number] => 11/232613 [patent_app_country] => US [patent_app_date] => 2005-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 37 [patent_no_of_words] => 10564 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0019/20060019448.pdf [firstpage_image] =>[orig_patent_app_number] => 11232613 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/232613
Termination for trench MIS device having implanted drain-drift region Sep 20, 2005 Issued
Array ( [id] => 5793677 [patent_doc_number] => 20060014358 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-01-19 [patent_title] => 'Method for microfabricating structures using silicon-on-insulator material' [patent_app_type] => utility [patent_app_number] => 11/231103 [patent_app_country] => US [patent_app_date] => 2005-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6298 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0014/20060014358.pdf [firstpage_image] =>[orig_patent_app_number] => 11231103 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/231103
Method for microfabricating structures using silicon-on-insulator material Sep 19, 2005 Issued
Array ( [id] => 485745 [patent_doc_number] => 07217661 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-05-15 [patent_title] => 'Small grain size, conformal aluminum interconnects and method for their formation' [patent_app_type] => utility [patent_app_number] => 11/230773 [patent_app_country] => US [patent_app_date] => 2005-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3254 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/217/07217661.pdf [firstpage_image] =>[orig_patent_app_number] => 11230773 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/230773
Small grain size, conformal aluminum interconnects and method for their formation Sep 19, 2005 Issued
Array ( [id] => 5591058 [patent_doc_number] => 20060040510 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-23 [patent_title] => 'Semiconductor device with silicon dioxide layers formed using atomic layer deposition' [patent_app_type] => utility [patent_app_number] => 11/225999 [patent_app_country] => US [patent_app_date] => 2005-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6592 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0040/20060040510.pdf [firstpage_image] =>[orig_patent_app_number] => 11225999 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/225999
Semiconductor device with silicon dioxide layers formed using atomic layer deposition Sep 13, 2005 Abandoned
Array ( [id] => 694750 [patent_doc_number] => 07071050 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-07-04 [patent_title] => 'Semiconductor integrated circuit device having single-element type non-volatile memory elements' [patent_app_type] => utility [patent_app_number] => 11/220723 [patent_app_country] => US [patent_app_date] => 2005-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 7557 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 326 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/071/07071050.pdf [firstpage_image] =>[orig_patent_app_number] => 11220723 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/220723
Semiconductor integrated circuit device having single-element type non-volatile memory elements Sep 7, 2005 Issued
Array ( [id] => 493456 [patent_doc_number] => 07211470 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-05-01 [patent_title] => 'Method and apparatus for depositing conductive paste in circuitized substrate openings' [patent_app_type] => utility [patent_app_number] => 11/216133 [patent_app_country] => US [patent_app_date] => 2005-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4714 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/211/07211470.pdf [firstpage_image] =>[orig_patent_app_number] => 11216133 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/216133
Method and apparatus for depositing conductive paste in circuitized substrate openings Aug 31, 2005 Issued
Array ( [id] => 5148992 [patent_doc_number] => 20070049052 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-01 [patent_title] => 'Method for processing a layered stack in the production of a semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/216524 [patent_app_country] => US [patent_app_date] => 2005-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4053 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0049/20070049052.pdf [firstpage_image] =>[orig_patent_app_number] => 11216524 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/216524
Method for processing a layered stack in the production of a semiconductor device Aug 30, 2005 Issued
Array ( [id] => 5148866 [patent_doc_number] => 20070048926 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-01 [patent_title] => 'Lanthanum aluminum oxynitride dielectric films' [patent_app_type] => utility [patent_app_number] => 11/216474 [patent_app_country] => US [patent_app_date] => 2005-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 9658 [patent_no_of_claims] => 59 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0048/20070048926.pdf [firstpage_image] =>[orig_patent_app_number] => 11216474 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/216474
Lanthanum aluminum oxynitride dielectric films Aug 30, 2005 Issued
Array ( [id] => 425090 [patent_doc_number] => 07271072 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-09-18 [patent_title] => 'Stud electrode and process for making same' [patent_app_type] => utility [patent_app_number] => 11/215922 [patent_app_country] => US [patent_app_date] => 2005-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 23 [patent_no_of_words] => 10166 [patent_no_of_claims] => 67 [patent_no_of_ind_claims] => 14 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/271/07271072.pdf [firstpage_image] =>[orig_patent_app_number] => 11215922 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/215922
Stud electrode and process for making same Aug 29, 2005 Issued
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