Search

Eric E. Silverman

Examiner (ID: 15411)

Most Active Art Unit
1618
Art Unit(s)
1618, 1615
Total Applications
298
Issued Applications
111
Pending Applications
2
Abandoned Applications
185

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5710631 [patent_doc_number] => 20060051976 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-09 [patent_title] => 'Nanoporous membrane reactor for miniaturized reactions and enhanced reaction kinetics' [patent_app_type] => utility [patent_app_number] => 11/199413 [patent_app_country] => US [patent_app_date] => 2005-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 16196 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0051/20060051976.pdf [firstpage_image] =>[orig_patent_app_number] => 11199413 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/199413
Nanoporous membrane reactor for miniaturized reactions and enhanced reaction kinetics Aug 7, 2005 Issued
Array ( [id] => 5051509 [patent_doc_number] => 20070032054 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-08 [patent_title] => 'Semiconductor substrate process using a low temperature deposited carbon-containing hard mask' [patent_app_type] => utility [patent_app_number] => 11/199593 [patent_app_country] => US [patent_app_date] => 2005-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 27127 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0032/20070032054.pdf [firstpage_image] =>[orig_patent_app_number] => 11199593 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/199593
Semiconductor substrate process using a low temperature deposited carbon-containing hard mask Aug 7, 2005 Issued
Array ( [id] => 7228767 [patent_doc_number] => 20050269675 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-08 [patent_title] => 'Internal package heat dissipator' [patent_app_type] => utility [patent_app_number] => 11/198580 [patent_app_country] => US [patent_app_date] => 2005-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5202 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0269/20050269675.pdf [firstpage_image] =>[orig_patent_app_number] => 11198580 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/198580
Internal package heat dissipator Aug 4, 2005 Issued
Array ( [id] => 5796427 [patent_doc_number] => 20060033104 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-16 [patent_title] => 'Thin film transistor, method of manufacturing thin film transistor, and display device' [patent_app_type] => utility [patent_app_number] => 11/197637 [patent_app_country] => US [patent_app_date] => 2005-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 9849 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0033/20060033104.pdf [firstpage_image] =>[orig_patent_app_number] => 11197637 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/197637
Thin film transistor, method of manufacturing thin film transistor, and display device Aug 4, 2005 Abandoned
Array ( [id] => 609424 [patent_doc_number] => 07151005 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-12-19 [patent_title] => 'Electrifying method and manufacturing method of electron-source substrate' [patent_app_type] => utility [patent_app_number] => 11/195671 [patent_app_country] => US [patent_app_date] => 2005-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 6865 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/151/07151005.pdf [firstpage_image] =>[orig_patent_app_number] => 11195671 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/195671
Electrifying method and manufacturing method of electron-source substrate Aug 2, 2005 Issued
Array ( [id] => 5049031 [patent_doc_number] => 20070029575 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-08 [patent_title] => 'Structure and method of measuring the capacitance' [patent_app_type] => utility [patent_app_number] => 11/195633 [patent_app_country] => US [patent_app_date] => 2005-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 1906 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0029/20070029575.pdf [firstpage_image] =>[orig_patent_app_number] => 11195633 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/195633
Structure and method of measuring the capacitance Aug 2, 2005 Abandoned
Array ( [id] => 542227 [patent_doc_number] => 07169692 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-01-30 [patent_title] => 'Method and apparatus to eliminate galvanic corrosion on copper doped aluminum bond pads on integrated circuits' [patent_app_type] => utility [patent_app_number] => 11/195434 [patent_app_country] => US [patent_app_date] => 2005-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2033 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/169/07169692.pdf [firstpage_image] =>[orig_patent_app_number] => 11195434 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/195434
Method and apparatus to eliminate galvanic corrosion on copper doped aluminum bond pads on integrated circuits Aug 1, 2005 Issued
Array ( [id] => 5242458 [patent_doc_number] => 20070020953 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-25 [patent_title] => 'Method for forming a high density dielectric film by chemical vapor deposition' [patent_app_type] => utility [patent_app_number] => 11/186353 [patent_app_country] => US [patent_app_date] => 2005-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3617 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 27 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0020/20070020953.pdf [firstpage_image] =>[orig_patent_app_number] => 11186353 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/186353
Method for forming a high density dielectric film by chemical vapor deposition Jul 20, 2005 Issued
Array ( [id] => 5765788 [patent_doc_number] => 20050263835 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-01 [patent_title] => 'Semiconductor device, and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 11/181788 [patent_app_country] => US [patent_app_date] => 2005-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 29047 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0263/20050263835.pdf [firstpage_image] =>[orig_patent_app_number] => 11181788 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/181788
Semiconductor device, and method of fabricating the same Jul 14, 2005 Issued
Array ( [id] => 525761 [patent_doc_number] => 07187019 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-03-06 [patent_title] => 'Solid state image pickup device and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 11/178926 [patent_app_country] => US [patent_app_date] => 2005-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 5401 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/187/07187019.pdf [firstpage_image] =>[orig_patent_app_number] => 11178926 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/178926
Solid state image pickup device and method of fabricating the same Jul 10, 2005 Issued
Array ( [id] => 612719 [patent_doc_number] => 07148116 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-12-12 [patent_title] => 'Semiconductor device with load resistor and fabrication method' [patent_app_type] => utility [patent_app_number] => 11/169894 [patent_app_country] => US [patent_app_date] => 2005-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 3671 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/148/07148116.pdf [firstpage_image] =>[orig_patent_app_number] => 11169894 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/169894
Semiconductor device with load resistor and fabrication method Jun 29, 2005 Issued
Array ( [id] => 5848718 [patent_doc_number] => 20060231924 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-19 [patent_title] => 'BIPOLAR TRANSISTOR STRUCTURE WITH SELF-ALIGNED RAISED EXTRINSIC BASE AND METHODS' [patent_app_type] => utility [patent_app_number] => 11/169444 [patent_app_country] => US [patent_app_date] => 2005-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 6177 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0231/20060231924.pdf [firstpage_image] =>[orig_patent_app_number] => 11169444 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/169444
Bipolar transistor structure with self-aligned raised extrinsic base and methods Jun 28, 2005 Issued
Array ( [id] => 4476991 [patent_doc_number] => 07906411 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-15 [patent_title] => 'Deposition technique for producing high quality compound semiconductor materials' [patent_app_type] => utility [patent_app_number] => 11/571514 [patent_app_country] => US [patent_app_date] => 2005-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 5682 [patent_no_of_claims] => 46 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/906/07906411.pdf [firstpage_image] =>[orig_patent_app_number] => 11571514 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/571514
Deposition technique for producing high quality compound semiconductor materials Jun 26, 2005 Issued
Array ( [id] => 6925981 [patent_doc_number] => 20050239236 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-27 [patent_title] => 'Printed circuit board and fabrication method thereof' [patent_app_type] => utility [patent_app_number] => 11/165173 [patent_app_country] => US [patent_app_date] => 2005-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4361 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0239/20050239236.pdf [firstpage_image] =>[orig_patent_app_number] => 11165173 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/165173
Printed circuit board and fabrication method thereof Jun 22, 2005 Issued
Array ( [id] => 5645444 [patent_doc_number] => 20060131176 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-22 [patent_title] => 'Multi-layer circuit board with fine pitches and fabricating method thereof' [patent_app_type] => utility [patent_app_number] => 11/160413 [patent_app_country] => US [patent_app_date] => 2005-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2721 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0131/20060131176.pdf [firstpage_image] =>[orig_patent_app_number] => 11160413 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/160413
Multi-layer circuit board with fine pitches and fabricating method thereof Jun 21, 2005 Issued
Array ( [id] => 5912987 [patent_doc_number] => 20060128049 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-15 [patent_title] => 'DEVICES HAVING VERTICALLY-DISPOSED NANOFABRIC ARTICLES AND METHODS OF MAKING THE SAME' [patent_app_type] => utility [patent_app_number] => 11/158217 [patent_app_country] => US [patent_app_date] => 2005-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 6531 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0128/20060128049.pdf [firstpage_image] =>[orig_patent_app_number] => 11158217 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/158217
Devices having vertically-disposed nanofabric articles and methods of making the same Jun 20, 2005 Issued
Array ( [id] => 5642883 [patent_doc_number] => 20060281338 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-14 [patent_title] => 'METHOD FOR PREDICTION OF PREMATURE DIELECTRIC BREAKDOWN IN A SEMICONDUCTOR' [patent_app_type] => utility [patent_app_number] => 11/160213 [patent_app_country] => US [patent_app_date] => 2005-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3374 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0281/20060281338.pdf [firstpage_image] =>[orig_patent_app_number] => 11160213 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/160213
METHOD FOR PREDICTION OF PREMATURE DIELECTRIC BREAKDOWN IN A SEMICONDUCTOR Jun 13, 2005 Abandoned
Array ( [id] => 281732 [patent_doc_number] => 07553732 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-06-30 [patent_title] => 'Integration scheme for constrained SEG growth on poly during raised S/D processing' [patent_app_type] => utility [patent_app_number] => 11/150923 [patent_app_country] => US [patent_app_date] => 2005-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 7551 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/553/07553732.pdf [firstpage_image] =>[orig_patent_app_number] => 11150923 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/150923
Integration scheme for constrained SEG growth on poly during raised S/D processing Jun 12, 2005 Issued
Array ( [id] => 645280 [patent_doc_number] => 07119003 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-10-10 [patent_title] => 'Extension of fatigue life for C4 solder ball to chip connection' [patent_app_type] => utility [patent_app_number] => 11/148923 [patent_app_country] => US [patent_app_date] => 2005-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3383 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/119/07119003.pdf [firstpage_image] =>[orig_patent_app_number] => 11148923 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/148923
Extension of fatigue life for C4 solder ball to chip connection Jun 7, 2005 Issued
Array ( [id] => 655846 [patent_doc_number] => 07109586 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-09-19 [patent_title] => 'System for reducing or eliminating semiconductor device wire sweep' [patent_app_type] => utility [patent_app_number] => 11/146366 [patent_app_country] => US [patent_app_date] => 2005-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 4161 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/109/07109586.pdf [firstpage_image] =>[orig_patent_app_number] => 11146366 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/146366
System for reducing or eliminating semiconductor device wire sweep Jun 5, 2005 Issued
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