Search

Eric E. Silverman

Examiner (ID: 15411)

Most Active Art Unit
1618
Art Unit(s)
1618, 1615
Total Applications
298
Issued Applications
111
Pending Applications
2
Abandoned Applications
185

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 548932 [patent_doc_number] => 07170190 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-01-30 [patent_title] => 'Apparatus for oscillating a head and methods for implementing the same' [patent_app_type] => utility [patent_app_number] => 10/738164 [patent_app_country] => US [patent_app_date] => 2003-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 19 [patent_no_of_words] => 9236 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/170/07170190.pdf [firstpage_image] =>[orig_patent_app_number] => 10738164 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/738164
Apparatus for oscillating a head and methods for implementing the same Dec 15, 2003 Issued
Array ( [id] => 785266 [patent_doc_number] => 06989338 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-01-24 [patent_title] => 'Method for forming a multi-layered structure of a semiconductor device and methods for forming a capacitor and a gate insulation layer using the multi-layered structure' [patent_app_type] => utility [patent_app_number] => 10/737394 [patent_app_country] => US [patent_app_date] => 2003-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 6804 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/989/06989338.pdf [firstpage_image] =>[orig_patent_app_number] => 10737394 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/737394
Method for forming a multi-layered structure of a semiconductor device and methods for forming a capacitor and a gate insulation layer using the multi-layered structure Dec 14, 2003 Issued
Array ( [id] => 5749531 [patent_doc_number] => 20060112466 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-25 [patent_title] => 'Nanostructure, electronic device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 10/533565 [patent_app_country] => US [patent_app_date] => 2003-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6378 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0112/20060112466.pdf [firstpage_image] =>[orig_patent_app_number] => 10533565 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/533565
Nanostructure, electronic device and method of manufacturing the same Dec 11, 2003 Issued
Array ( [id] => 7300153 [patent_doc_number] => 20040112537 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-17 [patent_title] => 'Plasma treatment apparatus and method for plasma treatment' [patent_app_type] => new [patent_app_number] => 10/731484 [patent_app_country] => US [patent_app_date] => 2003-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6406 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0112/20040112537.pdf [firstpage_image] =>[orig_patent_app_number] => 10731484 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/731484
Plasma treatment apparatus and method for plasma treatment Dec 9, 2003 Issued
Array ( [id] => 963669 [patent_doc_number] => 06949481 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-09-27 [patent_title] => 'Process for fabrication of spacer layer with reduced hydrogen content in semiconductor device' [patent_app_type] => utility [patent_app_number] => 10/731494 [patent_app_country] => US [patent_app_date] => 2003-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 9702 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/949/06949481.pdf [firstpage_image] =>[orig_patent_app_number] => 10731494 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/731494
Process for fabrication of spacer layer with reduced hydrogen content in semiconductor device Dec 8, 2003 Issued
Array ( [id] => 907069 [patent_doc_number] => 07332398 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-02-19 [patent_title] => 'Manufacture of trench-gate semiconductor devices' [patent_app_type] => utility [patent_app_number] => 10/538214 [patent_app_country] => US [patent_app_date] => 2003-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 11 [patent_no_of_words] => 4024 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/332/07332398.pdf [firstpage_image] =>[orig_patent_app_number] => 10538214 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/538214
Manufacture of trench-gate semiconductor devices Dec 7, 2003 Issued
Array ( [id] => 5843517 [patent_doc_number] => 20060121631 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-08 [patent_title] => 'Method of producing semiconductor elements using a test structure' [patent_app_type] => utility [patent_app_number] => 10/539103 [patent_app_country] => US [patent_app_date] => 2003-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3110 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0121/20060121631.pdf [firstpage_image] =>[orig_patent_app_number] => 10539103 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/539103
Method of producing semiconductor elements using a test structure Dec 4, 2003 Issued
Array ( [id] => 588932 [patent_doc_number] => 07435614 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-10-14 [patent_title] => 'Method for treating a structure to obtain an internal space and structure having an internal space' [patent_app_type] => utility [patent_app_number] => 10/539638 [patent_app_country] => US [patent_app_date] => 2003-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 4984 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/435/07435614.pdf [firstpage_image] =>[orig_patent_app_number] => 10539638 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/539638
Method for treating a structure to obtain an internal space and structure having an internal space Dec 3, 2003 Issued
Array ( [id] => 719828 [patent_doc_number] => 07049176 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-23 [patent_title] => 'Method of forming thick-film wiring and method of producing laminated electronic component' [patent_app_type] => utility [patent_app_number] => 10/724803 [patent_app_country] => US [patent_app_date] => 2003-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 7374 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/049/07049176.pdf [firstpage_image] =>[orig_patent_app_number] => 10724803 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/724803
Method of forming thick-film wiring and method of producing laminated electronic component Nov 30, 2003 Issued
Array ( [id] => 7463654 [patent_doc_number] => 20040120198 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-24 [patent_title] => 'Method for providing bitline contacts in a memory cell array and a memory cell array having bitline contacts' [patent_app_type] => new [patent_app_number] => 10/724903 [patent_app_country] => US [patent_app_date] => 2003-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 11216 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0120/20040120198.pdf [firstpage_image] =>[orig_patent_app_number] => 10724903 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/724903
Method for providing bitline contacts in a memory cell array and a memory cell array having bitline contacts Nov 30, 2003 Issued
Array ( [id] => 7607558 [patent_doc_number] => 07098157 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-08-29 [patent_title] => 'Method and apparatus for thermally treating disk-shaped substrates' [patent_app_type] => utility [patent_app_number] => 10/540614 [patent_app_country] => US [patent_app_date] => 2003-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 17 [patent_no_of_words] => 7771 [patent_no_of_claims] => 67 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 27 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/098/07098157.pdf [firstpage_image] =>[orig_patent_app_number] => 10540614 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/540614
Method and apparatus for thermally treating disk-shaped substrates Nov 27, 2003 Issued
Array ( [id] => 7389624 [patent_doc_number] => 20040173144 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-09 [patent_title] => 'Formation of printed circuit board structures using piezo microdeposition' [patent_app_type] => new [patent_app_number] => 10/479314 [patent_app_country] => US [patent_app_date] => 2003-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 14086 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0173/20040173144.pdf [firstpage_image] =>[orig_patent_app_number] => 10479314 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/479314
Formation of printed circuit board structures using piezo microdeposition Nov 25, 2003 Abandoned
Array ( [id] => 7453566 [patent_doc_number] => 20040100164 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-27 [patent_title] => 'Manufacturing method of electronic device' [patent_app_type] => new [patent_app_number] => 10/713253 [patent_app_country] => US [patent_app_date] => 2003-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 13068 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 299 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0100/20040100164.pdf [firstpage_image] =>[orig_patent_app_number] => 10713253 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/713253
Hermetically sealing a package to include a barrier metal Nov 16, 2003 Issued
Array ( [id] => 7104078 [patent_doc_number] => 20050106804 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-19 [patent_title] => 'Electrical contacts for molecular electronic transistors' [patent_app_type] => utility [patent_app_number] => 10/714083 [patent_app_country] => US [patent_app_date] => 2003-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5661 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0106/20050106804.pdf [firstpage_image] =>[orig_patent_app_number] => 10714083 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/714083
Electrical contacts for molecular electronic transistors Nov 14, 2003 Issued
Array ( [id] => 5723733 [patent_doc_number] => 20060054493 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-16 [patent_title] => 'Method for the production of a substrate and unit for the same' [patent_app_type] => utility [patent_app_number] => 10/536204 [patent_app_country] => US [patent_app_date] => 2003-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5032 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0054/20060054493.pdf [firstpage_image] =>[orig_patent_app_number] => 10536204 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/536204
Method of producing a substrate with a surface treated by a vacuum treatment process, use of said method for the production of coated workpieces and plasma treatment chamber Nov 12, 2003 Issued
Array ( [id] => 7470144 [patent_doc_number] => 20040096755 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-20 [patent_title] => 'Mask-making member and its production method, mask and its making method, exposure process, and fabrication method of semiconductor device' [patent_app_type] => new [patent_app_number] => 10/712333 [patent_app_country] => US [patent_app_date] => 2003-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9589 [patent_no_of_claims] => 86 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0096/20040096755.pdf [firstpage_image] =>[orig_patent_app_number] => 10712333 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/712333
Mask-making member and its production method, mask and its making method, exposure process, and fabrication method of semiconductor device Nov 12, 2003 Issued
Array ( [id] => 7675122 [patent_doc_number] => 20040126996 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-01 [patent_title] => 'Method and apparatus for machining substrate' [patent_app_type] => new [patent_app_number] => 10/712364 [patent_app_country] => US [patent_app_date] => 2003-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2106 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0126/20040126996.pdf [firstpage_image] =>[orig_patent_app_number] => 10712364 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/712364
Method and apparatus for machining substrate Nov 11, 2003 Issued
Array ( [id] => 500234 [patent_doc_number] => 07205205 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-04-17 [patent_title] => 'Ramp temperature techniques for improved mean wafer before clean' [patent_app_type] => utility [patent_app_number] => 10/712464 [patent_app_country] => US [patent_app_date] => 2003-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 4540 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/205/07205205.pdf [firstpage_image] =>[orig_patent_app_number] => 10712464 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/712464
Ramp temperature techniques for improved mean wafer before clean Nov 11, 2003 Issued
Array ( [id] => 7396351 [patent_doc_number] => 20040104357 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-03 [patent_title] => 'Electron beam exposure apparatus, electron beam exposing method, semiconductor element manufacturing method, and pattern error detection method' [patent_app_type] => new [patent_app_number] => 10/712594 [patent_app_country] => US [patent_app_date] => 2003-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 20563 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0104/20040104357.pdf [firstpage_image] =>[orig_patent_app_number] => 10712594 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/712594
Electron beam exposure apparatus, electron beam exposing method, semiconductor element manufacturing method, and pattern error detection method Nov 11, 2003 Issued
Array ( [id] => 6969560 [patent_doc_number] => 20050035270 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-17 [patent_title] => 'Solid state image pickup device and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 10/705553 [patent_app_country] => US [patent_app_date] => 2003-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5352 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0035/20050035270.pdf [firstpage_image] =>[orig_patent_app_number] => 10705553 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/705553
Solid state image pickup device and method of fabricating the same Nov 10, 2003 Issued
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