
Eric E. Silverman
Examiner (ID: 15411)
| Most Active Art Unit | 1618 |
| Art Unit(s) | 1618, 1615 |
| Total Applications | 298 |
| Issued Applications | 111 |
| Pending Applications | 2 |
| Abandoned Applications | 185 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 548932
[patent_doc_number] => 07170190
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2007-01-30
[patent_title] => 'Apparatus for oscillating a head and methods for implementing the same'
[patent_app_type] => utility
[patent_app_number] => 10/738164
[patent_app_country] => US
[patent_app_date] => 2003-12-16
[patent_effective_date] => 0000-00-00
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[patent_no_of_words] => 9236
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[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/170/07170190.pdf
[firstpage_image] =>[orig_patent_app_number] => 10738164
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/738164 | Apparatus for oscillating a head and methods for implementing the same | Dec 15, 2003 | Issued |
Array
(
[id] => 785266
[patent_doc_number] => 06989338
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-01-24
[patent_title] => 'Method for forming a multi-layered structure of a semiconductor device and methods for forming a capacitor and a gate insulation layer using the multi-layered structure'
[patent_app_type] => utility
[patent_app_number] => 10/737394
[patent_app_country] => US
[patent_app_date] => 2003-12-15
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[pdf_file] => patents/06/989/06989338.pdf
[firstpage_image] =>[orig_patent_app_number] => 10737394
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/737394 | Method for forming a multi-layered structure of a semiconductor device and methods for forming a capacitor and a gate insulation layer using the multi-layered structure | Dec 14, 2003 | Issued |
Array
(
[id] => 5749531
[patent_doc_number] => 20060112466
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-05-25
[patent_title] => 'Nanostructure, electronic device and method of manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 10/533565
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[patent_app_date] => 2003-12-12
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/533565 | Nanostructure, electronic device and method of manufacturing the same | Dec 11, 2003 | Issued |
Array
(
[id] => 7300153
[patent_doc_number] => 20040112537
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-06-17
[patent_title] => 'Plasma treatment apparatus and method for plasma treatment'
[patent_app_type] => new
[patent_app_number] => 10/731484
[patent_app_country] => US
[patent_app_date] => 2003-12-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/731484 | Plasma treatment apparatus and method for plasma treatment | Dec 9, 2003 | Issued |
Array
(
[id] => 963669
[patent_doc_number] => 06949481
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[patent_kind] => B1
[patent_issue_date] => 2005-09-27
[patent_title] => 'Process for fabrication of spacer layer with reduced hydrogen content in semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 10/731494
[patent_app_country] => US
[patent_app_date] => 2003-12-09
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[pdf_file] => patents/06/949/06949481.pdf
[firstpage_image] =>[orig_patent_app_number] => 10731494
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/731494 | Process for fabrication of spacer layer with reduced hydrogen content in semiconductor device | Dec 8, 2003 | Issued |
Array
(
[id] => 907069
[patent_doc_number] => 07332398
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[patent_issue_date] => 2008-02-19
[patent_title] => 'Manufacture of trench-gate semiconductor devices'
[patent_app_type] => utility
[patent_app_number] => 10/538214
[patent_app_country] => US
[patent_app_date] => 2003-12-08
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[pdf_file] => patents/07/332/07332398.pdf
[firstpage_image] =>[orig_patent_app_number] => 10538214
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/538214 | Manufacture of trench-gate semiconductor devices | Dec 7, 2003 | Issued |
Array
(
[id] => 5843517
[patent_doc_number] => 20060121631
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[patent_issue_date] => 2006-06-08
[patent_title] => 'Method of producing semiconductor elements using a test structure'
[patent_app_type] => utility
[patent_app_number] => 10/539103
[patent_app_country] => US
[patent_app_date] => 2003-12-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[pdf_file] => publications/A1/0121/20060121631.pdf
[firstpage_image] =>[orig_patent_app_number] => 10539103
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/539103 | Method of producing semiconductor elements using a test structure | Dec 4, 2003 | Issued |
Array
(
[id] => 588932
[patent_doc_number] => 07435614
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[patent_kind] => B2
[patent_issue_date] => 2008-10-14
[patent_title] => 'Method for treating a structure to obtain an internal space and structure having an internal space'
[patent_app_type] => utility
[patent_app_number] => 10/539638
[patent_app_country] => US
[patent_app_date] => 2003-12-04
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[patent_drawing_sheets_cnt] => 8
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[pdf_file] => patents/07/435/07435614.pdf
[firstpage_image] =>[orig_patent_app_number] => 10539638
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/539638 | Method for treating a structure to obtain an internal space and structure having an internal space | Dec 3, 2003 | Issued |
Array
(
[id] => 719828
[patent_doc_number] => 07049176
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-05-23
[patent_title] => 'Method of forming thick-film wiring and method of producing laminated electronic component'
[patent_app_type] => utility
[patent_app_number] => 10/724803
[patent_app_country] => US
[patent_app_date] => 2003-12-01
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/724803 | Method of forming thick-film wiring and method of producing laminated electronic component | Nov 30, 2003 | Issued |
Array
(
[id] => 7463654
[patent_doc_number] => 20040120198
[patent_country] => US
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[patent_issue_date] => 2004-06-24
[patent_title] => 'Method for providing bitline contacts in a memory cell array and a memory cell array having bitline contacts'
[patent_app_type] => new
[patent_app_number] => 10/724903
[patent_app_country] => US
[patent_app_date] => 2003-12-01
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/724903 | Method for providing bitline contacts in a memory cell array and a memory cell array having bitline contacts | Nov 30, 2003 | Issued |
Array
(
[id] => 7607558
[patent_doc_number] => 07098157
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[patent_issue_date] => 2006-08-29
[patent_title] => 'Method and apparatus for thermally treating disk-shaped substrates'
[patent_app_type] => utility
[patent_app_number] => 10/540614
[patent_app_country] => US
[patent_app_date] => 2003-11-28
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/540614 | Method and apparatus for thermally treating disk-shaped substrates | Nov 27, 2003 | Issued |
Array
(
[id] => 7389624
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[patent_title] => 'Formation of printed circuit board structures using piezo microdeposition'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/479314 | Formation of printed circuit board structures using piezo microdeposition | Nov 25, 2003 | Abandoned |
Array
(
[id] => 7453566
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[patent_title] => 'Manufacturing method of electronic device'
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[firstpage_image] =>[orig_patent_app_number] => 10713253
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/713253 | Hermetically sealing a package to include a barrier metal | Nov 16, 2003 | Issued |
Array
(
[id] => 7104078
[patent_doc_number] => 20050106804
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[patent_title] => 'Electrical contacts for molecular electronic transistors'
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/536204 | Method of producing a substrate with a surface treated by a vacuum treatment process, use of said method for the production of coated workpieces and plasma treatment chamber | Nov 12, 2003 | Issued |
Array
(
[id] => 7470144
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[patent_title] => 'Mask-making member and its production method, mask and its making method, exposure process, and fabrication method of semiconductor device'
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Array
(
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/705553 | Solid state image pickup device and method of fabricating the same | Nov 10, 2003 | Issued |