
Eric E. Silverman
Examiner (ID: 15411)
| Most Active Art Unit | 1618 |
| Art Unit(s) | 1618, 1615 |
| Total Applications | 298 |
| Issued Applications | 111 |
| Pending Applications | 2 |
| Abandoned Applications | 185 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 7522970
[patent_doc_number] => 08026126
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-09-27
[patent_title] => 'Apparatus and method for thin die detachment'
[patent_app_type] => utility
[patent_app_number] => 10/628503
[patent_app_country] => US
[patent_app_date] => 2003-07-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 2743
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 167
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/026/08026126.pdf
[firstpage_image] =>[orig_patent_app_number] => 10628503
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/628503 | Apparatus and method for thin die detachment | Jul 27, 2003 | Issued |
Array
(
[id] => 7021934
[patent_doc_number] => 20050016466
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-01-27
[patent_title] => 'Susceptor with raised tabs for semiconductor wafer processing'
[patent_app_type] => utility
[patent_app_number] => 10/626174
[patent_app_country] => US
[patent_app_date] => 2003-07-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 5472
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0016/20050016466.pdf
[firstpage_image] =>[orig_patent_app_number] => 10626174
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/626174 | Susceptor with raised tabs for semiconductor wafer processing | Jul 22, 2003 | Abandoned |
Array
(
[id] => 7222010
[patent_doc_number] => 20040072427
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-04-15
[patent_title] => 'Semiconductor nanoparticles, method for producing the same, and fluorescence reagent comprising semiconductor nanoparticles'
[patent_app_type] => new
[patent_app_number] => 10/622651
[patent_app_country] => US
[patent_app_date] => 2003-07-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3610
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 21
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0072/20040072427.pdf
[firstpage_image] =>[orig_patent_app_number] => 10622651
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/622651 | Semiconductor nanoparticles, method for producing the same, and fluorescence reagent comprising semiconductor nanoparticles | Jul 20, 2003 | Issued |
Array
(
[id] => 837275
[patent_doc_number] => 07394091
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-07-01
[patent_title] => 'Composite nano-particle and method for preparing the same'
[patent_app_type] => utility
[patent_app_number] => 10/521233
[patent_app_country] => US
[patent_app_date] => 2003-07-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 10049
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 184
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/394/07394091.pdf
[firstpage_image] =>[orig_patent_app_number] => 10521233
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/521233 | Composite nano-particle and method for preparing the same | Jul 15, 2003 | Issued |
Array
(
[id] => 754219
[patent_doc_number] => 07018862
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-03-28
[patent_title] => 'Micromachined electromechanical device'
[patent_app_type] => utility
[patent_app_number] => 10/619923
[patent_app_country] => US
[patent_app_date] => 2003-07-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 26
[patent_no_of_words] => 4090
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 70
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/018/07018862.pdf
[firstpage_image] =>[orig_patent_app_number] => 10619923
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/619923 | Micromachined electromechanical device | Jul 14, 2003 | Issued |
Array
(
[id] => 7398725
[patent_doc_number] => 20040018662
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-01-29
[patent_title] => 'Method of manufacturing a semiconductor device'
[patent_app_type] => new
[patent_app_number] => 10/619003
[patent_app_country] => US
[patent_app_date] => 2003-07-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3092
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 151
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0018/20040018662.pdf
[firstpage_image] =>[orig_patent_app_number] => 10619003
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/619003 | Method of manufacturing a semiconductor device | Jul 14, 2003 | Abandoned |
Array
(
[id] => 7409178
[patent_doc_number] => 20040106310
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-06-03
[patent_title] => 'Grounding inserts'
[patent_app_type] => new
[patent_app_number] => 10/619895
[patent_app_country] => US
[patent_app_date] => 2003-07-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 1182
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 246
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0106/20040106310.pdf
[firstpage_image] =>[orig_patent_app_number] => 10619895
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/619895 | Grounding inserts | Jul 14, 2003 | Issued |
Array
(
[id] => 5913062
[patent_doc_number] => 20060128124
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-06-15
[patent_title] => 'Growth of reduced dislocation density non-polar gallium nitride by hydride vapor phase epitaxy'
[patent_app_type] => utility
[patent_app_number] => 10/537644
[patent_app_country] => US
[patent_app_date] => 2003-07-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6151
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0128/20060128124.pdf
[firstpage_image] =>[orig_patent_app_number] => 10537644
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/537644 | Growth of reduced dislocation density non-polar gallium nitride by hydride vapor phase epitaxy | Jul 14, 2003 | Issued |
Array
(
[id] => 7089197
[patent_doc_number] => 20050009310
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-01-13
[patent_title] => 'Semi-insulating GaN and method of making the same'
[patent_app_type] => utility
[patent_app_number] => 10/618024
[patent_app_country] => US
[patent_app_date] => 2003-07-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 9361
[patent_no_of_claims] => 116
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0009/20050009310.pdf
[firstpage_image] =>[orig_patent_app_number] => 10618024
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/618024 | Semi-insulating GaN and method of making the same | Jul 10, 2003 | Issued |
Array
(
[id] => 749781
[patent_doc_number] => 07022617
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-04-04
[patent_title] => 'Small scale wires with microelectromechanical devices'
[patent_app_type] => utility
[patent_app_number] => 10/606812
[patent_app_country] => US
[patent_app_date] => 2003-06-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 24
[patent_no_of_words] => 4308
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 11
[patent_words_short_claim] => 40
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/022/07022617.pdf
[firstpage_image] =>[orig_patent_app_number] => 10606812
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/606812 | Small scale wires with microelectromechanical devices | Jun 25, 2003 | Issued |
Array
(
[id] => 963587
[patent_doc_number] => 06949399
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-09-27
[patent_title] => 'Method of reducing contamination-induced process variations during ion implantation'
[patent_app_type] => utility
[patent_app_number] => 10/602191
[patent_app_country] => US
[patent_app_date] => 2003-06-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 3175
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 65
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/949/06949399.pdf
[firstpage_image] =>[orig_patent_app_number] => 10602191
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/602191 | Method of reducing contamination-induced process variations during ion implantation | Jun 23, 2003 | Issued |
Array
(
[id] => 7429141
[patent_doc_number] => 20040266062
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-12-30
[patent_title] => 'Underfill integration for optical packages'
[patent_app_type] => new
[patent_app_number] => 10/606092
[patent_app_country] => US
[patent_app_date] => 2003-06-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3132
[patent_no_of_claims] => 46
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 76
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0266/20040266062.pdf
[firstpage_image] =>[orig_patent_app_number] => 10606092
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/606092 | Underfill integration for optical packages | Jun 23, 2003 | Issued |
Array
(
[id] => 634096
[patent_doc_number] => 07129152
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-10-31
[patent_title] => 'Method for fabricating a short channel field-effect transistor'
[patent_app_type] => utility
[patent_app_number] => 10/520743
[patent_app_country] => US
[patent_app_date] => 2003-06-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 17
[patent_no_of_words] => 4588
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 200
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/129/07129152.pdf
[firstpage_image] =>[orig_patent_app_number] => 10520743
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/520743 | Method for fabricating a short channel field-effect transistor | Jun 20, 2003 | Issued |
Array
(
[id] => 729844
[patent_doc_number] => 07042004
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-05-09
[patent_title] => 'Method of forming quantum-mechanical memory and computational devices and devices obtained thereof'
[patent_app_type] => utility
[patent_app_number] => 10/601321
[patent_app_country] => US
[patent_app_date] => 2003-06-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 24
[patent_no_of_words] => 7998
[patent_no_of_claims] => 40
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 45
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/042/07042004.pdf
[firstpage_image] =>[orig_patent_app_number] => 10601321
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/601321 | Method of forming quantum-mechanical memory and computational devices and devices obtained thereof | Jun 19, 2003 | Issued |
Array
(
[id] => 782714
[patent_doc_number] => 06991961
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-01-31
[patent_title] => 'Method of forming a high-voltage/high-power die package'
[patent_app_type] => utility
[patent_app_number] => 10/464151
[patent_app_country] => US
[patent_app_date] => 2003-06-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3043
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 126
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/991/06991961.pdf
[firstpage_image] =>[orig_patent_app_number] => 10464151
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/464151 | Method of forming a high-voltage/high-power die package | Jun 17, 2003 | Issued |
Array
(
[id] => 1123508
[patent_doc_number] => 06794306
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-09-21
[patent_title] => 'Semiconductor device having gate all around type transistor and method of forming the same'
[patent_app_type] => B2
[patent_app_number] => 10/463554
[patent_app_country] => US
[patent_app_date] => 2003-06-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 33
[patent_no_of_words] => 4114
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 178
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/794/06794306.pdf
[firstpage_image] =>[orig_patent_app_number] => 10463554
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/463554 | Semiconductor device having gate all around type transistor and method of forming the same | Jun 16, 2003 | Issued |
Array
(
[id] => 1119569
[patent_doc_number] => 06797531
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-09-28
[patent_title] => 'Process for producing microlens array, array master, electrolytic solution and microlens array resin material therefor and apparatus for producing master'
[patent_app_type] => B2
[patent_app_number] => 10/462616
[patent_app_country] => US
[patent_app_date] => 2003-06-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 8
[patent_no_of_words] => 9140
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 105
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/797/06797531.pdf
[firstpage_image] =>[orig_patent_app_number] => 10462616
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/462616 | Process for producing microlens array, array master, electrolytic solution and microlens array resin material therefor and apparatus for producing master | Jun 16, 2003 | Issued |
Array
(
[id] => 7404423
[patent_doc_number] => 20040262646
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-12-30
[patent_title] => 'Pixel design to maximize photodiode capacitance and method of forming same'
[patent_app_type] => new
[patent_app_number] => 10/461802
[patent_app_country] => US
[patent_app_date] => 2003-06-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 6940
[patent_no_of_claims] => 63
[patent_no_of_ind_claims] => 10
[patent_words_short_claim] => 47
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0262/20040262646.pdf
[firstpage_image] =>[orig_patent_app_number] => 10461802
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/461802 | Photodiode structure and image pixel structure | Jun 15, 2003 | Issued |
Array
(
[id] => 7344500
[patent_doc_number] => 20040010910
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-01-22
[patent_title] => 'Chip package sealing method'
[patent_app_type] => new
[patent_app_number] => 10/460942
[patent_app_country] => US
[patent_app_date] => 2003-06-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 4031
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 47
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0010/20040010910.pdf
[firstpage_image] =>[orig_patent_app_number] => 10460942
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/460942 | Chip package sealing method | Jun 12, 2003 | Issued |
Array
(
[id] => 7328976
[patent_doc_number] => 20040253807
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-12-16
[patent_title] => 'Barrier layer stack to prevent Ti diffusion'
[patent_app_type] => new
[patent_app_number] => 10/460981
[patent_app_country] => US
[patent_app_date] => 2003-06-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3838
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0253/20040253807.pdf
[firstpage_image] =>[orig_patent_app_number] => 10460981
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/460981 | Barrier layer stack to prevent Ti diffusion | Jun 12, 2003 | Issued |