
Eric E. Silverman
Examiner (ID: 15411)
| Most Active Art Unit | 1618 |
| Art Unit(s) | 1618, 1615 |
| Total Applications | 298 |
| Issued Applications | 111 |
| Pending Applications | 2 |
| Abandoned Applications | 185 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 7419022
[patent_doc_number] => 20040000333
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-01-01
[patent_title] => 'Monolithically integrated solid-state sige thermoelectric energy converter for high speed and low power circuits'
[patent_app_type] => new
[patent_app_number] => 10/459974
[patent_app_country] => US
[patent_app_date] => 2003-06-12
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0000/20040000333.pdf
[firstpage_image] =>[orig_patent_app_number] => 10459974
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/459974 | Monolithically integrated solid-state sige thermoelectric energy converter for high speed and low power circuits | Jun 11, 2003 | Issued |
Array
(
[id] => 7398876
[patent_doc_number] => 20040018694
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-01-29
[patent_title] => 'Methods for forming silicon dioxide layers on substrates using atomic layer deposition'
[patent_app_type] => new
[patent_app_number] => 10/459943
[patent_app_country] => US
[patent_app_date] => 2003-06-12
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[pdf_file] => publications/A1/0018/20040018694.pdf
[firstpage_image] =>[orig_patent_app_number] => 10459943
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/459943 | Methods for forming silicon dioxide layers on substrates using atomic layer deposition | Jun 11, 2003 | Issued |
Array
(
[id] => 6723406
[patent_doc_number] => 20030205718
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-11-06
[patent_title] => 'Light-emitting semiconductor device using group III nitride compound'
[patent_app_type] => new
[patent_app_number] => 10/456509
[patent_app_country] => US
[patent_app_date] => 2003-06-09
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[pdf_file] => publications/A1/0205/20030205718.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/456509 | Light-emitting semiconductor device using group III nitride compound | Jun 8, 2003 | Abandoned |
Array
(
[id] => 6723486
[patent_doc_number] => 20030205798
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-11-06
[patent_title] => 'Semiconductor die package including carrier with mask'
[patent_app_type] => new
[patent_app_number] => 10/455511
[patent_app_country] => US
[patent_app_date] => 2003-06-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/455511 | Semiconductor die package including carrier with mask and semiconductor die | Jun 3, 2003 | Issued |
Array
(
[id] => 390233
[patent_doc_number] => 07300829
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-11-27
[patent_title] => 'Low temperature process for TFT fabrication'
[patent_app_type] => utility
[patent_app_number] => 10/453333
[patent_app_country] => US
[patent_app_date] => 2003-06-02
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[pdf_file] => patents/07/300/07300829.pdf
[firstpage_image] =>[orig_patent_app_number] => 10453333
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/453333 | Low temperature process for TFT fabrication | Jun 1, 2003 | Issued |
Array
(
[id] => 1102651
[patent_doc_number] => 06815754
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[patent_issue_date] => 2004-11-09
[patent_title] => 'Spacer patterned, high dielectric constant capacitor'
[patent_app_type] => B2
[patent_app_number] => 10/441733
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[pdf_file] => patents/06/815/06815754.pdf
[firstpage_image] =>[orig_patent_app_number] => 10441733
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/441733 | Spacer patterned, high dielectric constant capacitor | May 19, 2003 | Issued |
Array
(
[id] => 5738568
[patent_doc_number] => 20060008959
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[patent_issue_date] => 2006-01-12
[patent_title] => 'Layer arrangement and memory arrangement'
[patent_app_type] => utility
[patent_app_number] => 10/514168
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[patent_app_date] => 2003-05-15
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[pdf_file] => publications/A1/0008/20060008959.pdf
[firstpage_image] =>[orig_patent_app_number] => 10514168
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/514168 | Method for fabricating a layer arrangement, layer arrangement and memory arrangement | May 14, 2003 | Issued |
Array
(
[id] => 931368
[patent_doc_number] => 06979872
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[patent_issue_date] => 2005-12-27
[patent_title] => 'Modules integrating MEMS devices with pre-processed electronic circuitry, and methods for fabricating such modules'
[patent_app_type] => utility
[patent_app_number] => 10/438512
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[pdf_file] => patents/06/979/06979872.pdf
[firstpage_image] =>[orig_patent_app_number] => 10438512
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/438512 | Modules integrating MEMS devices with pre-processed electronic circuitry, and methods for fabricating such modules | May 12, 2003 | Issued |
Array
(
[id] => 1002317
[patent_doc_number] => 06908771
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[patent_issue_date] => 2005-06-21
[patent_title] => 'Method for fabricating dc SQUID using high-Tc superconducting intrinsic Josephson junctions'
[patent_app_type] => utility
[patent_app_number] => 10/434224
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[patent_app_date] => 2003-05-09
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[pdf_file] => patents/06/908/06908771.pdf
[firstpage_image] =>[orig_patent_app_number] => 10434224
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/434224 | Method for fabricating dc SQUID using high-Tc superconducting intrinsic Josephson junctions | May 8, 2003 | Issued |
Array
(
[id] => 7317380
[patent_doc_number] => 20040224262
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[patent_issue_date] => 2004-11-11
[patent_title] => 'Direct alignment scheme between multiple lithography layers'
[patent_app_type] => new
[patent_app_number] => 10/435495
[patent_app_country] => US
[patent_app_date] => 2003-05-08
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/435495 | Direct alignment scheme between multiple lithography layers | May 7, 2003 | Issued |
Array
(
[id] => 6809222
[patent_doc_number] => 20030199161
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[patent_issue_date] => 2003-10-23
[patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND METHOD FOR MAKING THE SAME'
[patent_app_type] => new
[patent_app_number] => 10/430402
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/430402 | Semiconductor integrated circuit device and method for making the same | May 6, 2003 | Issued |
Array
(
[id] => 6725175
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[patent_title] => 'Single crystal, dual wafer, tunneling sensor and a method of making same'
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Array
(
[id] => 563883
[patent_doc_number] => 07157781
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[patent_title] => 'Enhancement of membrane characteristics in semiconductor device with membrane'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/425663 | Enhancement of membrane characteristics in semiconductor device with membrane | Apr 29, 2003 | Issued |
Array
(
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[patent_title] => 'Apparatus for and method of manufacturing a semiconductor device, and cleaning method for use in the apparatus for manufacturing a semiconductor device'
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/424874 | Method of fabricating a semiconductor device incorporating crystallizing by laser irradiation | Apr 28, 2003 | Issued |
Array
(
[id] => 435863
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[patent_title] => 'Method for incorporating germanium into a semiconductor wafer'
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[patent_app_number] => 10/423184
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/423184 | Method for incorporating germanium into a semiconductor wafer | Apr 24, 2003 | Issued |
Array
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[patent_title] => 'Deposition of permanent polymer structures for OLED fabrication'
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Array
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Array
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