Search

Eric Frank Winakur

Examiner (ID: 185, Phone: (571)272-4736 , Office: P/3777 )

Most Active Art Unit
3736
Art Unit(s)
3791, 3735, 3768, 3777, 2899, 3311, 3736
Total Applications
2497
Issued Applications
1849
Pending Applications
331
Abandoned Applications
337

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 15476653 [patent_doc_number] => 10554222 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-04 [patent_title] => Transmitter and parity permutation method thereof [patent_app_type] => utility [patent_app_number] => 15/058348 [patent_app_country] => US [patent_app_date] => 2016-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 32584 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 385 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15058348 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/058348
Transmitter and parity permutation method thereof Mar 1, 2016 Issued
Array ( [id] => 14708791 [patent_doc_number] => 10382165 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-13 [patent_title] => Transmitter and shortening method thereof [patent_app_type] => utility [patent_app_number] => 15/058515 [patent_app_country] => US [patent_app_date] => 2016-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 29214 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 401 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15058515 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/058515
Transmitter and shortening method thereof Mar 1, 2016 Issued
Array ( [id] => 11531046 [patent_doc_number] => 20170091025 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-30 [patent_title] => 'MEMORY SYSTEM AND METHOD FOR ERROR CORRECTION OF MEMORY' [patent_app_type] => utility [patent_app_number] => 15/059102 [patent_app_country] => US [patent_app_date] => 2016-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4586 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15059102 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/059102
Memory system and method for error correction of memory Mar 1, 2016 Issued
Array ( [id] => 11791582 [patent_doc_number] => 09401222 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-07-26 [patent_title] => 'Determining categories for memory fail conditions' [patent_app_type] => utility [patent_app_number] => 14/948743 [patent_app_country] => US [patent_app_date] => 2015-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 19 [patent_no_of_words] => 14013 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 18 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14948743 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/948743
Determining categories for memory fail conditions Nov 22, 2015 Issued
Array ( [id] => 11608951 [patent_doc_number] => 20170126256 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-05-04 [patent_title] => 'DYNAMIC CLIENT-SIDE SELECTION OF FEC INFORMATION' [patent_app_type] => utility [patent_app_number] => 14/930543 [patent_app_country] => US [patent_app_date] => 2015-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 11690 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14930543 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/930543
Dynamic client-side selection of FEC information Nov 1, 2015 Issued
Array ( [id] => 12173840 [patent_doc_number] => 09891985 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-02-13 [patent_title] => '256-bit parallel parser and checksum circuit with 1-hot state information bus' [patent_app_type] => utility [patent_app_number] => 14/929275 [patent_app_country] => US [patent_app_date] => 2015-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 133 [patent_figures_cnt] => 136 [patent_no_of_words] => 7654 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14929275 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/929275
256-bit parallel parser and checksum circuit with 1-hot state information bus Oct 30, 2015 Issued
Array ( [id] => 11313210 [patent_doc_number] => 20160349321 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-01 [patent_title] => 'TEST DEVICE' [patent_app_type] => utility [patent_app_number] => 14/928656 [patent_app_country] => US [patent_app_date] => 2015-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5226 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14928656 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/928656
Test device Oct 29, 2015 Issued
Array ( [id] => 11608943 [patent_doc_number] => 20170126249 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-05-04 [patent_title] => 'TEMPERATURE DEPENDENT MULTIPLE MODE ERROR CORRECTION' [patent_app_type] => utility [patent_app_number] => 14/929163 [patent_app_country] => US [patent_app_date] => 2015-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 14180 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14929163 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/929163
TEMPERATURE DEPENDENT MULTIPLE MODE ERROR CORRECTION Oct 29, 2015 Abandoned
Array ( [id] => 11102842 [patent_doc_number] => 20160299812 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-13 [patent_title] => 'Device-Specific Variable Error Correction' [patent_app_type] => utility [patent_app_number] => 14/929148 [patent_app_country] => US [patent_app_date] => 2015-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 20821 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14929148 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/929148
Device-Specific Variable Error Correction Oct 29, 2015 Abandoned
Array ( [id] => 10778654 [patent_doc_number] => 20160124810 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-05-05 [patent_title] => '3D MEMORY WITH ERROR CHECKING AND CORRECTION FUNCTION' [patent_app_type] => utility [patent_app_number] => 14/928317 [patent_app_country] => US [patent_app_date] => 2015-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5030 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14928317 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/928317
3D memory with error checking and correction function Oct 29, 2015 Issued
Array ( [id] => 11606598 [patent_doc_number] => 20170123902 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-05-04 [patent_title] => 'PARTIAL SOFT BIT READ' [patent_app_type] => utility [patent_app_number] => 14/927088 [patent_app_country] => US [patent_app_date] => 2015-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 10579 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14927088 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/927088
Partial soft bit read Oct 28, 2015 Issued
Array ( [id] => 14179237 [patent_doc_number] => 10263644 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-04-16 [patent_title] => Hybrid architecture for LDPC channel coding in data center [patent_app_type] => utility [patent_app_number] => 14/925825 [patent_app_country] => US [patent_app_date] => 2015-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 8236 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14925825 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/925825
Hybrid architecture for LDPC channel coding in data center Oct 27, 2015 Issued
Array ( [id] => 11860876 [patent_doc_number] => 09740559 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-08-22 [patent_title] => 'Systems and methods for compaction based flash memory data recovery' [patent_app_type] => utility [patent_app_number] => 14/925726 [patent_app_country] => US [patent_app_date] => 2015-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 12125 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14925726 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/925726
Systems and methods for compaction based flash memory data recovery Oct 27, 2015 Issued
Array ( [id] => 10710772 [patent_doc_number] => 20160056919 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-02-25 [patent_title] => 'SIGNAL PROTECTION' [patent_app_type] => utility [patent_app_number] => 14/923317 [patent_app_country] => US [patent_app_date] => 2015-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3238 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14923317 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/923317
Signal protection Oct 25, 2015 Issued
Array ( [id] => 10695078 [patent_doc_number] => 20160041225 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-02-11 [patent_title] => 'CIRCUIT AND METHOD FOR DIAGNOSING SCAN CHAIN FAILURES' [patent_app_type] => utility [patent_app_number] => 14/920718 [patent_app_country] => US [patent_app_date] => 2015-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6755 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14920718 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/920718
Circuit and method for diagnosing scan chain failures Oct 21, 2015 Issued
Array ( [id] => 13086371 [patent_doc_number] => 10063261 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-08-28 [patent_title] => Communication endpoints and related methods for forward error correction of packetized data [patent_app_type] => utility [patent_app_number] => 14/882118 [patent_app_country] => US [patent_app_date] => 2015-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 32 [patent_no_of_words] => 15990 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 342 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14882118 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/882118
Communication endpoints and related methods for forward error correction of packetized data Oct 12, 2015 Issued
Array ( [id] => 12250790 [patent_doc_number] => 09923580 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-03-20 [patent_title] => 'Error correction decoder and operation method of the error correction decoder' [patent_app_type] => utility [patent_app_number] => 14/877448 [patent_app_country] => US [patent_app_date] => 2015-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 14170 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14877448 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/877448
Error correction decoder and operation method of the error correction decoder Oct 6, 2015 Issued
Array ( [id] => 11124159 [patent_doc_number] => 20160321133 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-03 [patent_title] => 'VERIFYING ACCURATE STORAGE IN A DATA STORAGE SYSTEM' [patent_app_type] => utility [patent_app_number] => 14/874198 [patent_app_country] => US [patent_app_date] => 2015-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 10097 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14874198 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/874198
VERIFYING ACCURATE STORAGE IN A DATA STORAGE SYSTEM Oct 1, 2015 Abandoned
Array ( [id] => 12250872 [patent_doc_number] => 09923664 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-03-20 [patent_title] => 'Common-mode signaling for transition encoding' [patent_app_type] => utility [patent_app_number] => 14/866798 [patent_app_country] => US [patent_app_date] => 2015-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 5657 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14866798 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/866798
Common-mode signaling for transition encoding Sep 24, 2015 Issued
Array ( [id] => 10473095 [patent_doc_number] => 20150358112 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-10 [patent_title] => 'FEEDBACK WITH UNEQUAL ERROR PROTECTION' [patent_app_type] => utility [patent_app_number] => 14/828264 [patent_app_country] => US [patent_app_date] => 2015-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 9502 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14828264 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/828264
Feedback with unequal error protection Aug 16, 2015 Issued
Menu