Search

Eric Frank Winakur

Examiner (ID: 185, Phone: (571)272-4736 , Office: P/3777 )

Most Active Art Unit
3736
Art Unit(s)
3791, 3735, 3768, 3777, 2899, 3311, 3736
Total Applications
2497
Issued Applications
1849
Pending Applications
331
Abandoned Applications
337

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 846278 [patent_doc_number] => 07389449 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-06-17 [patent_title] => 'Edge selecting triggering circuit' [patent_app_type] => utility [patent_app_number] => 11/069879 [patent_app_country] => US [patent_app_date] => 2005-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 4839 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/389/07389449.pdf [firstpage_image] =>[orig_patent_app_number] => 11069879 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/069879
Edge selecting triggering circuit Feb 27, 2005 Issued
Array ( [id] => 7178215 [patent_doc_number] => 20050204233 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-15 [patent_title] => 'System-on-chip (SOC) having built-in-self-test circuits and a self-test method of the SOC' [patent_app_type] => utility [patent_app_number] => 11/066585 [patent_app_country] => US [patent_app_date] => 2005-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7987 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0204/20050204233.pdf [firstpage_image] =>[orig_patent_app_number] => 11066585 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/066585
System-on-chip (SOC) having built-in-self-test circuits and a self-test method of the SOC Feb 24, 2005 Issued
Array ( [id] => 374996 [patent_doc_number] => 07475304 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-01-06 [patent_title] => 'Bit error tester' [patent_app_type] => utility [patent_app_number] => 11/070576 [patent_app_country] => US [patent_app_date] => 2005-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2568 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/475/07475304.pdf [firstpage_image] =>[orig_patent_app_number] => 11070576 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/070576
Bit error tester Feb 24, 2005 Issued
Array ( [id] => 596903 [patent_doc_number] => 07454681 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-11-18 [patent_title] => 'Automatic test system with synchronized instruments' [patent_app_type] => utility [patent_app_number] => 11/063289 [patent_app_country] => US [patent_app_date] => 2005-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 10771 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/454/07454681.pdf [firstpage_image] =>[orig_patent_app_number] => 11063289 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/063289
Automatic test system with synchronized instruments Feb 21, 2005 Issued
Array ( [id] => 5695970 [patent_doc_number] => 20060156117 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-13 [patent_title] => 'Processor, its error analytical method and program' [patent_app_type] => utility [patent_app_number] => 11/056357 [patent_app_country] => US [patent_app_date] => 2005-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 7624 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0156/20060156117.pdf [firstpage_image] =>[orig_patent_app_number] => 11056357 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/056357
Processor, its error analytical method and program Feb 13, 2005 Abandoned
Array ( [id] => 5879253 [patent_doc_number] => 20060168490 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-27 [patent_title] => 'Apparatus and method of controlling test modes of a scannable latch in a test scan chain' [patent_app_type] => utility [patent_app_number] => 11/041584 [patent_app_country] => US [patent_app_date] => 2005-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5378 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0168/20060168490.pdf [firstpage_image] =>[orig_patent_app_number] => 11041584 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/041584
Apparatus and method of controlling test modes of a scannable latch in a test scan chain Jan 23, 2005 Abandoned
Array ( [id] => 5638998 [patent_doc_number] => 20060069972 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-30 [patent_title] => 'Methods and computer program products for debugging clock-related scan testing failures of integrated circuits' [patent_app_type] => utility [patent_app_number] => 10/950637 [patent_app_country] => US [patent_app_date] => 2004-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4899 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0069/20060069972.pdf [firstpage_image] =>[orig_patent_app_number] => 10950637 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/950637
Methods and computer program products for debugging clock-related scan testing failures of integrated circuits Sep 27, 2004 Issued
Array ( [id] => 6995389 [patent_doc_number] => 20050135167 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-23 [patent_title] => 'Memory access circuit for adjusting delay of internal clock signal used for memory control' [patent_app_type] => utility [patent_app_number] => 10/950471 [patent_app_country] => US [patent_app_date] => 2004-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 12990 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0135/20050135167.pdf [firstpage_image] =>[orig_patent_app_number] => 10950471 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/950471
Memory access circuit for adjusting delay of internal clock signal used for memory control Sep 27, 2004 Abandoned
Array ( [id] => 6907199 [patent_doc_number] => 20050102594 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-12 [patent_title] => 'Method for test application and test content generation for AC faults in integrated circuits' [patent_app_type] => utility [patent_app_number] => 10/951278 [patent_app_country] => US [patent_app_date] => 2004-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 8418 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0102/20050102594.pdf [firstpage_image] =>[orig_patent_app_number] => 10951278 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/951278
Method for test application and test content generation for AC faults in integrated circuits Sep 26, 2004 Abandoned
Array ( [id] => 6992524 [patent_doc_number] => 20050091561 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-04-28 [patent_title] => 'Scan test method, device, and system' [patent_app_type] => utility [patent_app_number] => 10/947209 [patent_app_country] => US [patent_app_date] => 2004-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6206 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0091/20050091561.pdf [firstpage_image] =>[orig_patent_app_number] => 10947209 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/947209
Scan test method, device, and system Sep 22, 2004 Abandoned
Array ( [id] => 7260499 [patent_doc_number] => 20050076277 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-04-07 [patent_title] => 'Test apparatus with static storage device and test method' [patent_app_type] => utility [patent_app_number] => 10/947564 [patent_app_country] => US [patent_app_date] => 2004-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3747 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0076/20050076277.pdf [firstpage_image] =>[orig_patent_app_number] => 10947564 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/947564
Test apparatus with static storage device and test method Sep 21, 2004 Abandoned
Array ( [id] => 6992526 [patent_doc_number] => 20050091563 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-04-28 [patent_title] => 'On chip diagnosis block with mixed redundancy' [patent_app_type] => utility [patent_app_number] => 10/942274 [patent_app_country] => US [patent_app_date] => 2004-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 2548 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0091/20050091563.pdf [firstpage_image] =>[orig_patent_app_number] => 10942274 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/942274
On chip diagnosis block with mixed redundancy Sep 15, 2004 Issued
Array ( [id] => 7129363 [patent_doc_number] => 20050060621 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-17 [patent_title] => 'Method and system for direct access memory testing of an integrated circuit' [patent_app_type] => utility [patent_app_number] => 10/940146 [patent_app_country] => US [patent_app_date] => 2004-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5782 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0060/20050060621.pdf [firstpage_image] =>[orig_patent_app_number] => 10940146 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/940146
Method and system for direct access memory testing of an integrated circuit Sep 12, 2004 Issued
Array ( [id] => 6927581 [patent_doc_number] => 20050240838 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-27 [patent_title] => 'Semiconductor memory device having code bit cell array' [patent_app_type] => utility [patent_app_number] => 10/928168 [patent_app_country] => US [patent_app_date] => 2004-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5724 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0240/20050240838.pdf [firstpage_image] =>[orig_patent_app_number] => 10928168 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/928168
Semiconductor memory device having code bit cell array Aug 29, 2004 Abandoned
Array ( [id] => 7223289 [patent_doc_number] => 20050055618 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-10 [patent_title] => 'Test arrangement and method for selecting a test mode output channel' [patent_app_type] => utility [patent_app_number] => 10/926371 [patent_app_country] => US [patent_app_date] => 2004-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4239 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0055/20050055618.pdf [firstpage_image] =>[orig_patent_app_number] => 10926371 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/926371
Test arrangement and method for selecting a test mode output channel Aug 24, 2004 Abandoned
Array ( [id] => 7441023 [patent_doc_number] => 20040163022 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-19 [patent_title] => 'Low overhead input and output boundary scan cells' [patent_app_type] => new [patent_app_number] => 10/773784 [patent_app_country] => US [patent_app_date] => 2004-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 10198 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0163/20040163022.pdf [firstpage_image] =>[orig_patent_app_number] => 10773784 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/773784
Initializing an output memory circuit of a scan cell Feb 5, 2004 Issued
Array ( [id] => 7418868 [patent_doc_number] => 20040177300 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-09 [patent_title] => 'Apparatus with a test interface' [patent_app_type] => new [patent_app_number] => 10/482015 [patent_app_country] => US [patent_app_date] => 2003-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5054 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0177/20040177300.pdf [firstpage_image] =>[orig_patent_app_number] => 10482015 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/482015
Apparatus with a test interface Dec 22, 2003 Abandoned
Array ( [id] => 7418912 [patent_doc_number] => 20040177306 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-09 [patent_title] => 'Transmission device and transmission method' [patent_app_type] => new [patent_app_number] => 10/480822 [patent_app_country] => US [patent_app_date] => 2003-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5417 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0177/20040177306.pdf [firstpage_image] =>[orig_patent_app_number] => 10480822 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/480822
Transmission device and transmission method Dec 14, 2003 Abandoned
Array ( [id] => 7284638 [patent_doc_number] => 20040145939 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-29 [patent_title] => 'Non-volatile semiconductor storage device and production method thereof' [patent_app_type] => new [patent_app_number] => 10/478095 [patent_app_country] => US [patent_app_date] => 2003-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 10488 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0145/20040145939.pdf [firstpage_image] =>[orig_patent_app_number] => 10478095 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/478095
Non-volatile semiconductor storage device and production method thereof Nov 18, 2003 Abandoned
Array ( [id] => 7477165 [patent_doc_number] => 20040098648 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-20 [patent_title] => 'Boundary scan with strobed pad driver enable' [patent_app_type] => new [patent_app_number] => 10/701479 [patent_app_country] => US [patent_app_date] => 2003-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4263 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0098/20040098648.pdf [firstpage_image] =>[orig_patent_app_number] => 10701479 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/701479
Boundary scan with strobed pad driver enable Nov 5, 2003 Issued
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