Search

Eric K. Ashbahian

Examiner (ID: 3069, Phone: (571)270-5187 , Office: P/2891 )

Most Active Art Unit
2891
Art Unit(s)
2891
Total Applications
528
Issued Applications
294
Pending Applications
107
Abandoned Applications
160

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14938773 [patent_doc_number] => 20190305025 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-03 [patent_title] => IMAGING PANEL [patent_app_type] => utility [patent_app_number] => 16/367311 [patent_app_country] => US [patent_app_date] => 2019-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10433 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16367311 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/367311
IMAGING PANEL Mar 27, 2019 Abandoned
Array ( [id] => 18641314 [patent_doc_number] => 11765958 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-19 [patent_title] => Display device [patent_app_type] => utility [patent_app_number] => 16/358202 [patent_app_country] => US [patent_app_date] => 2019-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5823 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 303 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16358202 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/358202
Display device Mar 18, 2019 Issued
Array ( [id] => 17716700 [patent_doc_number] => 11380699 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-05 [patent_title] => Memory array and methods used in forming a memory array [patent_app_type] => utility [patent_app_number] => 16/288982 [patent_app_country] => US [patent_app_date] => 2019-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 20 [patent_no_of_words] => 7230 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 275 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16288982 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/288982
Memory array and methods used in forming a memory array Feb 27, 2019 Issued
Array ( [id] => 17063215 [patent_doc_number] => 11107827 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-31 [patent_title] => Integration of split gate metal-oxide-nitride-oxide-semiconductor memory with vertical FET [patent_app_type] => utility [patent_app_number] => 16/288906 [patent_app_country] => US [patent_app_date] => 2019-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 43 [patent_no_of_words] => 10227 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16288906 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/288906
Integration of split gate metal-oxide-nitride-oxide-semiconductor memory with vertical FET Feb 27, 2019 Issued
Array ( [id] => 14969211 [patent_doc_number] => 20190312084 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-10 [patent_title] => LIGHT EMITTING DIODE APPARATUS AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/289101 [patent_app_country] => US [patent_app_date] => 2019-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9033 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16289101 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/289101
LIGHT EMITTING DIODE APPARATUS AND MANUFACTURING METHOD THEREOF Feb 27, 2019 Abandoned
Array ( [id] => 16218654 [patent_doc_number] => 10734477 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-04 [patent_title] => FinFET with reduced parasitic capacitance [patent_app_type] => utility [patent_app_number] => 16/245289 [patent_app_country] => US [patent_app_date] => 2019-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 19 [patent_no_of_words] => 3987 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16245289 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/245289
FinFET with reduced parasitic capacitance Jan 10, 2019 Issued
Array ( [id] => 16692297 [patent_doc_number] => 20210074776 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-11 [patent_title] => Pixel Arrangement Structure, Display Substrate and Display Device [patent_app_type] => utility [patent_app_number] => 16/633937 [patent_app_country] => US [patent_app_date] => 2019-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7209 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16633937 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/633937
Pixel arrangement structure, display substrate and display device Jan 10, 2019 Issued
Array ( [id] => 16081075 [patent_doc_number] => 20200194524 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-18 [patent_title] => ORGANIC LIGHT EMITTING DIODE DISPLAY AND METHOD OF MANUFACTURING THEREOF [patent_app_type] => utility [patent_app_number] => 16/333232 [patent_app_country] => US [patent_app_date] => 2019-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2898 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16333232 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/333232
ORGANIC LIGHT EMITTING DIODE DISPLAY AND METHOD OF MANUFACTURING THEREOF Jan 3, 2019 Abandoned
Array ( [id] => 16944416 [patent_doc_number] => 11056669 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-06 [patent_title] => Flip-chip light emitting diode and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 16/221706 [patent_app_country] => US [patent_app_date] => 2018-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 3055 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16221706 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/221706
Flip-chip light emitting diode and manufacturing method thereof Dec 16, 2018 Issued
Array ( [id] => 14191523 [patent_doc_number] => 20190115467 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-18 [patent_title] => Semiconductor Devices and Methods for Forming a Semiconductor Device [patent_app_type] => utility [patent_app_number] => 16/210624 [patent_app_country] => US [patent_app_date] => 2018-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9704 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16210624 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/210624
Semiconductor devices and methods for forming a semiconductor device Dec 4, 2018 Issued
Array ( [id] => 16379416 [patent_doc_number] => 20200328259 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-15 [patent_title] => DISPLAY DEVICE HAVING PYRAMID SUBPIXEL ARRAY STRUCTURE [patent_app_type] => utility [patent_app_number] => 16/772672 [patent_app_country] => US [patent_app_date] => 2018-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8467 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16772672 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/772672
DISPLAY DEVICE HAVING PYRAMID SUBPIXEL ARRAY STRUCTURE Nov 27, 2018 Abandoned
Array ( [id] => 17174298 [patent_doc_number] => 20210327969 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-21 [patent_title] => PIXEL ARRANGEMENT STRUCTURE AND DISPLAY PANEL [patent_app_type] => utility [patent_app_number] => 16/326024 [patent_app_country] => US [patent_app_date] => 2018-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3178 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16326024 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/326024
PIXEL ARRANGEMENT STRUCTURE AND DISPLAY PANEL Nov 22, 2018 Abandoned
Array ( [id] => 17607357 [patent_doc_number] => 11335849 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-17 [patent_title] => Magnetic domain wall displacement type magnetic recording element and magnetic recording array [patent_app_type] => utility [patent_app_number] => 16/191893 [patent_app_country] => US [patent_app_date] => 2018-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 16 [patent_no_of_words] => 12222 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 327 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16191893 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/191893
Magnetic domain wall displacement type magnetic recording element and magnetic recording array Nov 14, 2018 Issued
Array ( [id] => 14509673 [patent_doc_number] => 20190198491 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-27 [patent_title] => INTEGRATED CIRCUITS HAVING CROSS-COUPLE CONSTRUCTS AND SEMICONDUCTOR DEVICES INCLUDING INTEGRATED CIRCUITS [patent_app_type] => utility [patent_app_number] => 16/191720 [patent_app_country] => US [patent_app_date] => 2018-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12598 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16191720 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/191720
Integrated circuits having cross-couple constructs and semiconductor devices including integrated circuits Nov 14, 2018 Issued
Array ( [id] => 14938729 [patent_doc_number] => 20190305003 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-03 [patent_title] => ARRAY SUBSTRATE AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 16/191806 [patent_app_country] => US [patent_app_date] => 2018-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4295 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16191806 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/191806
Array substrate and display device Nov 14, 2018 Issued
Array ( [id] => 14317727 [patent_doc_number] => 20190148567 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-16 [patent_title] => S/N RATIO IMPROVED PHOTO-DETECTION DEVICE AND ITS MANUFACTURING METHOD [patent_app_type] => utility [patent_app_number] => 16/192059 [patent_app_country] => US [patent_app_date] => 2018-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4642 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16192059 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/192059
S/N RATIO IMPROVED PHOTO-DETECTION DEVICE AND ITS MANUFACTURING METHOD Nov 14, 2018 Abandoned
Array ( [id] => 17971329 [patent_doc_number] => 11488877 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-01 [patent_title] => Semiconductor device including test structure [patent_app_type] => utility [patent_app_number] => 16/191881 [patent_app_country] => US [patent_app_date] => 2018-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 11966 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16191881 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/191881
Semiconductor device including test structure Nov 14, 2018 Issued
Array ( [id] => 13963451 [patent_doc_number] => 20190058070 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-21 [patent_title] => Backside Illuminated Photo-Sensitive Device with Gradated Buffer Layer [patent_app_type] => utility [patent_app_number] => 16/166656 [patent_app_country] => US [patent_app_date] => 2018-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3615 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16166656 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/166656
Backside illuminated photo-sensitive device with gradated buffer layer Oct 21, 2018 Issued
Array ( [id] => 14573445 [patent_doc_number] => 20190214330 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-11 [patent_title] => HIGH POWER TRANSISTORS [patent_app_type] => utility [patent_app_number] => 16/165261 [patent_app_country] => US [patent_app_date] => 2018-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5165 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16165261 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/165261
High power transistors Oct 18, 2018 Issued
Array ( [id] => 17078123 [patent_doc_number] => 11114539 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-07 [patent_title] => Gate stack for heterostructure device [patent_app_type] => utility [patent_app_number] => 16/158560 [patent_app_country] => US [patent_app_date] => 2018-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4651 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 273 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16158560 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/158560
Gate stack for heterostructure device Oct 11, 2018 Issued
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