Search

Eric L. Bolda

Examiner (ID: 3663, Phone: (571)272-8104 , Office: P/3645 )

Most Active Art Unit
3645
Art Unit(s)
3663, 3645
Total Applications
1623
Issued Applications
1345
Pending Applications
108
Abandoned Applications
199

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8438263 [patent_doc_number] => 08286048 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-10-09 [patent_title] => 'Dynamically scaled LLR for an LDPC decoder' [patent_app_type] => utility [patent_app_number] => 12/346043 [patent_app_country] => US [patent_app_date] => 2008-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8081 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12346043 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/346043
Dynamically scaled LLR for an LDPC decoder Dec 29, 2008 Issued
Array ( [id] => 6312756 [patent_doc_number] => 20100070813 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-03-18 [patent_title] => 'Packet Retransmission Method and Related Electronic Device' [patent_app_type] => utility [patent_app_number] => 12/345673 [patent_app_country] => US [patent_app_date] => 2008-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1879 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0070/20100070813.pdf [firstpage_image] =>[orig_patent_app_number] => 12345673 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/345673
Packet retransmission method and related electronic device Dec 29, 2008 Issued
Array ( [id] => 8208239 [patent_doc_number] => 08190962 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-05-29 [patent_title] => 'System and method for dynamic maximal iteration' [patent_app_type] => utility [patent_app_number] => 12/346021 [patent_app_country] => US [patent_app_date] => 2008-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7964 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/190/08190962.pdf [firstpage_image] =>[orig_patent_app_number] => 12346021 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/346021
System and method for dynamic maximal iteration Dec 29, 2008 Issued
Array ( [id] => 6447329 [patent_doc_number] => 20100169729 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-01 [patent_title] => 'ENABLING AN INTEGRATED MEMORY CONTROLLER TO TRANSPARENTLY WORK WITH DEFECTIVE MEMORY DEVICES' [patent_app_type] => utility [patent_app_number] => 12/345948 [patent_app_country] => US [patent_app_date] => 2008-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2714 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0169/20100169729.pdf [firstpage_image] =>[orig_patent_app_number] => 12345948 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/345948
ENABLING AN INTEGRATED MEMORY CONTROLLER TO TRANSPARENTLY WORK WITH DEFECTIVE MEMORY DEVICES Dec 29, 2008 Abandoned
Array ( [id] => 5356458 [patent_doc_number] => 20090187802 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-23 [patent_title] => 'DECODING DEVICE AND METHOD, PROGRAM, AND RECORDING MEDIUM' [patent_app_type] => utility [patent_app_number] => 12/346372 [patent_app_country] => US [patent_app_date] => 2008-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7076 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0187/20090187802.pdf [firstpage_image] =>[orig_patent_app_number] => 12346372 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/346372
DECODING DEVICE AND METHOD, PROGRAM, AND RECORDING MEDIUM Dec 29, 2008 Abandoned
Array ( [id] => 7813483 [patent_doc_number] => 08136021 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-03-13 [patent_title] => 'Generation of Golay-based systematic block code supporting various sizes' [patent_app_type] => utility [patent_app_number] => 12/345394 [patent_app_country] => US [patent_app_date] => 2008-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 22 [patent_no_of_words] => 12883 [patent_no_of_claims] => 46 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/136/08136021.pdf [firstpage_image] =>[orig_patent_app_number] => 12345394 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/345394
Generation of Golay-based systematic block code supporting various sizes Dec 28, 2008 Issued
Array ( [id] => 6447586 [patent_doc_number] => 20100169742 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-01 [patent_title] => 'FLASH MEMORY SOFT ERROR RECOVERY' [patent_app_type] => utility [patent_app_number] => 12/345557 [patent_app_country] => US [patent_app_date] => 2008-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3316 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0169/20100169742.pdf [firstpage_image] =>[orig_patent_app_number] => 12345557 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/345557
FLASH MEMORY SOFT ERROR RECOVERY Dec 28, 2008 Abandoned
Array ( [id] => 180070 [patent_doc_number] => 07657786 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-02-02 [patent_title] => 'Storage switch system, storage switch method, management server, management method, and management program' [patent_app_type] => utility [patent_app_number] => 12/341274 [patent_app_country] => US [patent_app_date] => 2008-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 17 [patent_no_of_words] => 6810 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/657/07657786.pdf [firstpage_image] =>[orig_patent_app_number] => 12341274 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/341274
Storage switch system, storage switch method, management server, management method, and management program Dec 21, 2008 Issued
Array ( [id] => 5266883 [patent_doc_number] => 20090119568 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-05-07 [patent_title] => 'Single CRC polynomial for both turbo code block CRC and transport block CRC' [patent_app_type] => utility [patent_app_number] => 12/261572 [patent_app_country] => US [patent_app_date] => 2008-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 8892 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0119/20090119568.pdf [firstpage_image] =>[orig_patent_app_number] => 12261572 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/261572
Single CRC polynomial for both turbo code block CRC and transport block CRC Oct 29, 2008 Issued
Array ( [id] => 8716175 [patent_doc_number] => 08402327 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-19 [patent_title] => 'Memory system with error correction and method of operation' [patent_app_type] => utility [patent_app_number] => 12/260727 [patent_app_country] => US [patent_app_date] => 2008-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4317 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12260727 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/260727
Memory system with error correction and method of operation Oct 28, 2008 Issued
Array ( [id] => 8120251 [patent_doc_number] => 08161345 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-04-17 [patent_title] => 'LDPC decoders using fixed and adjustable permutators' [patent_app_type] => utility [patent_app_number] => 12/260608 [patent_app_country] => US [patent_app_date] => 2008-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6478 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/161/08161345.pdf [firstpage_image] =>[orig_patent_app_number] => 12260608 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/260608
LDPC decoders using fixed and adjustable permutators Oct 28, 2008 Issued
Array ( [id] => 5266879 [patent_doc_number] => 20090119564 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-05-07 [patent_title] => 'Methods and Apparatus for Processing Error Control Messages in a Wireless Communication System' [patent_app_type] => utility [patent_app_number] => 12/260189 [patent_app_country] => US [patent_app_date] => 2008-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5624 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0119/20090119564.pdf [firstpage_image] =>[orig_patent_app_number] => 12260189 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/260189
Methods and apparatus for processing error control messages in a wireless communication system Oct 28, 2008 Issued
Array ( [id] => 9630049 [patent_doc_number] => 08799743 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-05 [patent_title] => 'Error correction in multiple semiconductor memory units' [patent_app_type] => utility [patent_app_number] => 12/259949 [patent_app_country] => US [patent_app_date] => 2008-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9470 [patent_no_of_claims] => 58 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12259949 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/259949
Error correction in multiple semiconductor memory units Oct 27, 2008 Issued
Array ( [id] => 5587427 [patent_doc_number] => 20090106629 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-23 [patent_title] => 'RDS COMPATIBLE RECEIVER AND RDS DATA RECEIVING METHOD' [patent_app_type] => utility [patent_app_number] => 12/255374 [patent_app_country] => US [patent_app_date] => 2008-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4757 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0106/20090106629.pdf [firstpage_image] =>[orig_patent_app_number] => 12255374 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/255374
RDS compatible receiver and RDS data receiving method Oct 20, 2008 Issued
Array ( [id] => 4646990 [patent_doc_number] => 08024603 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-09-20 [patent_title] => 'Data migration satisfying migration-destination requirements' [patent_app_type] => utility [patent_app_number] => 12/254270 [patent_app_country] => US [patent_app_date] => 2008-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 32 [patent_no_of_words] => 13142 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 383 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/024/08024603.pdf [firstpage_image] =>[orig_patent_app_number] => 12254270 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/254270
Data migration satisfying migration-destination requirements Oct 19, 2008 Issued
Array ( [id] => 5587418 [patent_doc_number] => 20090106620 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-23 [patent_title] => 'DECODING APPARATUS, DECODING METHOD AND PROGRAM' [patent_app_type] => utility [patent_app_number] => 12/252470 [patent_app_country] => US [patent_app_date] => 2008-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 19088 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0106/20090106620.pdf [firstpage_image] =>[orig_patent_app_number] => 12252470 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/252470
LDPC decoding apparatus, decoding method and program Oct 15, 2008 Issued
Array ( [id] => 4530701 [patent_doc_number] => 07913118 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-22 [patent_title] => 'In-circuit debugging system and related method' [patent_app_type] => utility [patent_app_number] => 12/252338 [patent_app_country] => US [patent_app_date] => 2008-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4559 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/913/07913118.pdf [firstpage_image] =>[orig_patent_app_number] => 12252338 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/252338
In-circuit debugging system and related method Oct 14, 2008 Issued
Array ( [id] => 6512104 [patent_doc_number] => 20100095193 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-15 [patent_title] => 'System and Method for Pre-calculating Checksums' [patent_app_type] => utility [patent_app_number] => 12/252061 [patent_app_country] => US [patent_app_date] => 2008-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5168 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0095/20100095193.pdf [firstpage_image] =>[orig_patent_app_number] => 12252061 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/252061
System and method for pre-calculating checksums Oct 14, 2008 Issued
Array ( [id] => 6312742 [patent_doc_number] => 20100070805 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-03-18 [patent_title] => 'Method and Apparatus for Validating System Properties Exhibited in Execution Traces' [patent_app_type] => utility [patent_app_number] => 12/212758 [patent_app_country] => US [patent_app_date] => 2008-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7417 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0070/20100070805.pdf [firstpage_image] =>[orig_patent_app_number] => 12212758 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/212758
Method and apparatus for validating system properties exhibited in execution traces Sep 17, 2008 Issued
Array ( [id] => 6312745 [patent_doc_number] => 20100070807 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-03-18 [patent_title] => 'SYSTEM AND METHOD FOR MANAGING SERVER PERFORMANCE DEGRADATION IN A VIRTUAL UNIVERSE' [patent_app_type] => utility [patent_app_number] => 12/212399 [patent_app_country] => US [patent_app_date] => 2008-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7471 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0070/20100070807.pdf [firstpage_image] =>[orig_patent_app_number] => 12212399 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/212399
System and method for managing server performance degradation in a virtual universe Sep 16, 2008 Issued
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