
Eric L. Bolda
Examiner (ID: 3663)
| Most Active Art Unit | 3645 |
| Art Unit(s) | 3663, 3645 |
| Total Applications | 1623 |
| Issued Applications | 1345 |
| Pending Applications | 108 |
| Abandoned Applications | 199 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4722555
[patent_doc_number] => 20080244324
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-10-02
[patent_title] => 'Method and system for providing enhanced exception messages for exceptions thrown by virtual machines'
[patent_app_type] => utility
[patent_app_number] => 11/731505
[patent_app_country] => US
[patent_app_date] => 2007-03-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 7333
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0244/20080244324.pdf
[firstpage_image] =>[orig_patent_app_number] => 11731505
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/731505 | Method and system for providing enhanced exception messages for exceptions thrown by virtual machines | Mar 29, 2007 | Issued |
Array
(
[id] => 877740
[patent_doc_number] => 07363537
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2008-04-22
[patent_title] => 'System and method for fault-tolerant synchronization of replica updates for fixed persistent consistency point image consumption'
[patent_app_type] => utility
[patent_app_number] => 11/639929
[patent_app_country] => US
[patent_app_date] => 2006-12-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 9886
[patent_no_of_claims] => 36
[patent_no_of_ind_claims] => 12
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/363/07363537.pdf
[firstpage_image] =>[orig_patent_app_number] => 11639929
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/639929 | System and method for fault-tolerant synchronization of replica updates for fixed persistent consistency point image consumption | Dec 14, 2006 | Issued |
Array
(
[id] => 245142
[patent_doc_number] => 07590886
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-09-15
[patent_title] => 'Method and apparatus for facilitating device redundancy in a fault-tolerant system'
[patent_app_type] => utility
[patent_app_number] => 11/561931
[patent_app_country] => US
[patent_app_date] => 2006-11-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 4263
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/590/07590886.pdf
[firstpage_image] =>[orig_patent_app_number] => 11561931
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/561931 | Method and apparatus for facilitating device redundancy in a fault-tolerant system | Nov 20, 2006 | Issued |
Array
(
[id] => 7694244
[patent_doc_number] => 20080120500
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-05-22
[patent_title] => 'ALTERNATING FAULT TOLERANT RECONFIGURABLE COMPUTING ARCHITECTURE'
[patent_app_type] => utility
[patent_app_number] => 11/561500
[patent_app_country] => US
[patent_app_date] => 2006-11-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2951
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0120/20080120500.pdf
[firstpage_image] =>[orig_patent_app_number] => 11561500
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/561500 | Alternating fault tolerant reconfigurable computing architecture | Nov 19, 2006 | Issued |
Array
(
[id] => 5114901
[patent_doc_number] => 20070198817
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-08-23
[patent_title] => 'MICROPROCESSOR AND PROCESSING METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 11/561672
[patent_app_country] => US
[patent_app_date] => 2006-11-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 5088
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0198/20070198817.pdf
[firstpage_image] =>[orig_patent_app_number] => 11561672
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/561672 | Microprocessor and processing method thereof | Nov 19, 2006 | Issued |
Array
(
[id] => 146680
[patent_doc_number] => 07689870
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-03-30
[patent_title] => 'Efficient and flexible trace trigger handling for non-concurrent events'
[patent_app_type] => utility
[patent_app_number] => 11/561010
[patent_app_country] => US
[patent_app_date] => 2006-11-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 6398
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 307
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/689/07689870.pdf
[firstpage_image] =>[orig_patent_app_number] => 11561010
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/561010 | Efficient and flexible trace trigger handling for non-concurrent events | Nov 16, 2006 | Issued |
Array
(
[id] => 87803
[patent_doc_number] => 07743278
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-06-22
[patent_title] => 'Test access control for plural processors of an integrated circuit'
[patent_app_type] => utility
[patent_app_number] => 11/600208
[patent_app_country] => US
[patent_app_date] => 2006-11-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 11
[patent_no_of_words] => 5637
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 173
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/743/07743278.pdf
[firstpage_image] =>[orig_patent_app_number] => 11600208
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/600208 | Test access control for plural processors of an integrated circuit | Nov 15, 2006 | Issued |
Array
(
[id] => 9023532
[patent_doc_number] => 08533530
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-09-10
[patent_title] => 'Method and system for trusted/untrusted digital signal processor debugging operations'
[patent_app_type] => utility
[patent_app_number] => 11/560332
[patent_app_country] => US
[patent_app_date] => 2006-11-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 6512
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11560332
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/560332 | Method and system for trusted/untrusted digital signal processor debugging operations | Nov 14, 2006 | Issued |
Array
(
[id] => 166771
[patent_doc_number] => 07673191
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-03-02
[patent_title] => 'Baselining backend component error rate to determine application performance'
[patent_app_type] => utility
[patent_app_number] => 11/559755
[patent_app_country] => US
[patent_app_date] => 2006-11-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 13
[patent_no_of_words] => 9860
[patent_no_of_claims] => 35
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 159
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/673/07673191.pdf
[firstpage_image] =>[orig_patent_app_number] => 11559755
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/559755 | Baselining backend component error rate to determine application performance | Nov 13, 2006 | Issued |
Array
(
[id] => 4966864
[patent_doc_number] => 20080109684
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-05-08
[patent_title] => 'BASELINING BACKEND COMPONENT RESPONSE TIME TO DETERMINE APPLICATION PERFORMANCE'
[patent_app_type] => utility
[patent_app_number] => 11/559750
[patent_app_country] => US
[patent_app_date] => 2006-11-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 9980
[patent_no_of_claims] => 39
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0109/20080109684.pdf
[firstpage_image] =>[orig_patent_app_number] => 11559750
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/559750 | Baselining backend component response time to determine application performance | Nov 13, 2006 | Issued |
Array
(
[id] => 4966863
[patent_doc_number] => 20080109683
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-05-08
[patent_title] => 'AUTOMATED ERROR REPORTING AND DIAGNOSIS IN DISTRIBUTED COMPUTING ENVIRONMENT'
[patent_app_type] => utility
[patent_app_number] => 11/557346
[patent_app_country] => US
[patent_app_date] => 2006-11-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 8151
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0109/20080109683.pdf
[firstpage_image] =>[orig_patent_app_number] => 11557346
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/557346 | Automated error reporting and diagnosis in distributed computing environment | Nov 6, 2006 | Issued |
Array
(
[id] => 4881962
[patent_doc_number] => 20080155345
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-06-26
[patent_title] => 'APPARATUS AND METHOD FOR FORMING A BUS TRANSACTION TRACE STREAM WITH SIMPLIFIED BUS TRANSACTION DESCRIPTORS'
[patent_app_type] => utility
[patent_app_number] => 11/555122
[patent_app_country] => US
[patent_app_date] => 2006-10-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 7229
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0155/20080155345.pdf
[firstpage_image] =>[orig_patent_app_number] => 11555122
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/555122 | APPARATUS AND METHOD FOR FORMING A BUS TRANSACTION TRACE STREAM WITH SIMPLIFIED BUS TRANSACTION DESCRIPTORS | Oct 30, 2006 | Abandoned |
Array
(
[id] => 4798944
[patent_doc_number] => 20080010530
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-01-10
[patent_title] => 'FAULT-ISOLATING SAS EXPANDER'
[patent_app_type] => utility
[patent_app_number] => 11/552140
[patent_app_country] => US
[patent_app_date] => 2006-10-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 6732
[patent_no_of_claims] => 60
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0010/20080010530.pdf
[firstpage_image] =>[orig_patent_app_number] => 11552140
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/552140 | Fault-isolating SAS expander | Oct 22, 2006 | Issued |
Array
(
[id] => 5173637
[patent_doc_number] => 20070074077
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-03-29
[patent_title] => 'Acoustic power spectra sensor for hard disk drive to provide early detection of drive failure and diagnostic capabilities'
[patent_app_type] => utility
[patent_app_number] => 11/549385
[patent_app_country] => US
[patent_app_date] => 2006-10-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 6034
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0074/20070074077.pdf
[firstpage_image] =>[orig_patent_app_number] => 11549385
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/549385 | Acoustic power spectra sensor for hard disk drive to provide early detection of drive failure and diagnostic capabilities | Oct 12, 2006 | Abandoned |
Array
(
[id] => 4712891
[patent_doc_number] => 20080301417
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-12-04
[patent_title] => 'System and Method for Debugging of Computer'
[patent_app_type] => utility
[patent_app_number] => 12/090974
[patent_app_country] => US
[patent_app_date] => 2006-10-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6957
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0301/20080301417.pdf
[firstpage_image] =>[orig_patent_app_number] => 12090974
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/090974 | System and method for bi-directional debugging of computer | Oct 10, 2006 | Issued |
Array
(
[id] => 5052892
[patent_doc_number] => 20070033437
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-02-08
[patent_title] => 'Data processing system'
[patent_app_type] => utility
[patent_app_number] => 11/545990
[patent_app_country] => US
[patent_app_date] => 2006-10-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 10958
[patent_no_of_claims] => 40
[patent_no_of_ind_claims] => 13
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0033/20070033437.pdf
[firstpage_image] =>[orig_patent_app_number] => 11545990
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/545990 | Data processing system | Oct 9, 2006 | Issued |
Array
(
[id] => 4642003
[patent_doc_number] => 08020038
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-09-13
[patent_title] => 'System and method for adjusting operating points of a processor based on detected processor errors'
[patent_app_type] => utility
[patent_app_number] => 11/529145
[patent_app_country] => US
[patent_app_date] => 2006-09-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 5547
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 215
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/020/08020038.pdf
[firstpage_image] =>[orig_patent_app_number] => 11529145
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/529145 | System and method for adjusting operating points of a processor based on detected processor errors | Sep 27, 2006 | Issued |
Array
(
[id] => 4830149
[patent_doc_number] => 20080126842
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-05-29
[patent_title] => 'Redundancy recovery within a distributed data-storage system'
[patent_app_type] => utility
[patent_app_number] => 11/527875
[patent_app_country] => US
[patent_app_date] => 2006-09-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 52
[patent_figures_cnt] => 52
[patent_no_of_words] => 18359
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0126/20080126842.pdf
[firstpage_image] =>[orig_patent_app_number] => 11527875
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/527875 | Sufficient free space for redundancy recovery within a distributed data-storage system | Sep 26, 2006 | Issued |
Array
(
[id] => 305786
[patent_doc_number] => 07536582
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2009-05-19
[patent_title] => 'Fault-tolerant match-and-set locking mechanism for multiprocessor systems'
[patent_app_type] => utility
[patent_app_number] => 11/527064
[patent_app_country] => US
[patent_app_date] => 2006-09-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 9
[patent_no_of_words] => 4671
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 177
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/536/07536582.pdf
[firstpage_image] =>[orig_patent_app_number] => 11527064
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/527064 | Fault-tolerant match-and-set locking mechanism for multiprocessor systems | Sep 25, 2006 | Issued |
Array
(
[id] => 4830143
[patent_doc_number] => 20080126839
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-05-29
[patent_title] => 'Optimized reconstruction and copyback methodology for a failed drive in the presence of a global hot spare disc'
[patent_app_type] => utility
[patent_app_number] => 11/523452
[patent_app_country] => US
[patent_app_date] => 2006-09-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 2862
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0126/20080126839.pdf
[firstpage_image] =>[orig_patent_app_number] => 11523452
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/523452 | Optimized reconstruction and copyback methodology for a failed drive in the presence of a global hot spare disc | Sep 18, 2006 | Abandoned |