
Eric Nilsson
Examiner (ID: 449, Phone: (571)272-5246 , Office: P/2122 )
| Most Active Art Unit | 2122 |
| Art Unit(s) | 2122, 2151, 2198 |
| Total Applications | 584 |
| Issued Applications | 436 |
| Pending Applications | 68 |
| Abandoned Applications | 84 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 7352824
[patent_doc_number] => 20040048428
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-03-11
[patent_title] => 'Semiconductor device and method of manufacturing the same'
[patent_app_type] => new
[patent_app_number] => 10/640319
[patent_app_country] => US
[patent_app_date] => 2003-08-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 6420
[patent_no_of_claims] => 24
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[patent_words_short_claim] => 155
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0048/20040048428.pdf
[firstpage_image] =>[orig_patent_app_number] => 10640319
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/640319 | Semiconductor device and method of manufacturing the same | Aug 13, 2003 | Abandoned |
Array
(
[id] => 7030960
[patent_doc_number] => 20050029595
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-02-10
[patent_title] => 'METHOD AND APPARATUS FOR PREVENTING MICROCIRCUIT DYNAMIC THERMO-MECHANICAL DAMAGE DURING AN ESD EVENT'
[patent_app_type] => utility
[patent_app_number] => 10/635390
[patent_app_country] => US
[patent_app_date] => 2003-08-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[patent_no_of_words] => 5615
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[pdf_file] => publications/A1/0029/20050029595.pdf
[firstpage_image] =>[orig_patent_app_number] => 10635390
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/635390 | Method and apparatus for preventing microcircuit dynamic thermo-mechanical damage during an ESD event | Aug 5, 2003 | Issued |
Array
(
[id] => 721245
[patent_doc_number] => 07049667
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-05-23
[patent_title] => 'Conductive channel pseudo block process and circuit to inhibit reverse engineering'
[patent_app_type] => utility
[patent_app_number] => 10/635790
[patent_app_country] => US
[patent_app_date] => 2003-08-05
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/07/049/07049667.pdf
[firstpage_image] =>[orig_patent_app_number] => 10635790
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/635790 | Conductive channel pseudo block process and circuit to inhibit reverse engineering | Aug 4, 2003 | Issued |
Array
(
[id] => 7267759
[patent_doc_number] => 20040056277
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-03-25
[patent_title] => 'Semiconductor multi-package module including stacked-die package and having wire bond interconnect between stacked packages'
[patent_app_type] => new
[patent_app_number] => 10/632550
[patent_app_country] => US
[patent_app_date] => 2003-08-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
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[patent_no_of_words] => 14919
[patent_no_of_claims] => 17
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[firstpage_image] =>[orig_patent_app_number] => 10632550
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/632550 | Semiconductor multi-package module including stacked-die package and having wire bond interconnect between stacked packages | Aug 1, 2003 | Issued |
Array
(
[id] => 7147998
[patent_doc_number] => 20050023674
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-02-03
[patent_title] => 'Multi-chip module having bonding wires and method of fabricating the same'
[patent_app_type] => utility
[patent_app_number] => 10/632700
[patent_app_country] => US
[patent_app_date] => 2003-07-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[patent_no_of_words] => 3264
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[pdf_file] => publications/A1/0023/20050023674.pdf
[firstpage_image] =>[orig_patent_app_number] => 10632700
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/632700 | Multi-chip module having bonding wires and method of fabricating the same | Jul 30, 2003 | Issued |
Array
(
[id] => 7386448
[patent_doc_number] => 20040021153
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-02-05
[patent_title] => 'Semiconductor device and manufacturing method thereof'
[patent_app_type] => new
[patent_app_number] => 10/630900
[patent_app_country] => US
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[patent_drawing_sheets_cnt] => 6
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[pdf_file] => publications/A1/0021/20040021153.pdf
[firstpage_image] =>[orig_patent_app_number] => 10630900
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/630900 | Semiconductor device including a photosensitive resin covering at least a portion of a substrate having a via hole | Jul 30, 2003 | Issued |
Array
(
[id] => 7147851
[patent_doc_number] => 20050023631
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-02-03
[patent_title] => 'Controlled dry etch of a film'
[patent_app_type] => utility
[patent_app_number] => 10/633149
[patent_app_country] => US
[patent_app_date] => 2003-07-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[patent_no_of_words] => 1073
[patent_no_of_claims] => 19
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[pdf_file] => publications/A1/0023/20050023631.pdf
[firstpage_image] =>[orig_patent_app_number] => 10633149
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/633149 | Controlled dry etch of a film | Jul 30, 2003 | Abandoned |
Array
(
[id] => 1113808
[patent_doc_number] => 06803660
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-10-12
[patent_title] => 'Patterning layers comprised of spin-on ceramic films'
[patent_app_type] => B1
[patent_app_number] => 10/627790
[patent_app_country] => US
[patent_app_date] => 2003-07-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_no_of_words] => 4800
[patent_no_of_claims] => 9
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[pdf_file] => patents/06/803/06803660.pdf
[firstpage_image] =>[orig_patent_app_number] => 10627790
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/627790 | Patterning layers comprised of spin-on ceramic films | Jul 24, 2003 | Issued |
Array
(
[id] => 972584
[patent_doc_number] => 06936878
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-08-30
[patent_title] => 'Semiconductor memory device with reduced memory cell area'
[patent_app_type] => utility
[patent_app_number] => 10/626594
[patent_app_country] => US
[patent_app_date] => 2003-07-25
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[pdf_file] => patents/06/936/06936878.pdf
[firstpage_image] =>[orig_patent_app_number] => 10626594
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/626594 | Semiconductor memory device with reduced memory cell area | Jul 24, 2003 | Issued |
Array
(
[id] => 1183017
[patent_doc_number] => 06737702
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-05-18
[patent_title] => 'Zero power memory cell with reduced threshold voltage'
[patent_app_type] => B1
[patent_app_number] => 10/626089
[patent_app_country] => US
[patent_app_date] => 2003-07-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[pdf_file] => patents/06/737/06737702.pdf
[firstpage_image] =>[orig_patent_app_number] => 10626089
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/626089 | Zero power memory cell with reduced threshold voltage | Jul 23, 2003 | Issued |
Array
(
[id] => 1144925
[patent_doc_number] => 06777799
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-08-17
[patent_title] => 'Stacked semiconductor device and method of producing the same'
[patent_app_type] => B2
[patent_app_number] => 10/623490
[patent_app_country] => US
[patent_app_date] => 2003-07-22
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[pdf_file] => patents/06/777/06777799.pdf
[firstpage_image] =>[orig_patent_app_number] => 10623490
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/623490 | Stacked semiconductor device and method of producing the same | Jul 21, 2003 | Issued |
Array
(
[id] => 1071843
[patent_doc_number] => 06841427
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-01-11
[patent_title] => 'Electrooptical displays constructed with polymerization initiating and enhancing elements positioned between substrates'
[patent_app_type] => utility
[patent_app_number] => 10/619790
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[firstpage_image] =>[orig_patent_app_number] => 10619790
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/619790 | Electrooptical displays constructed with polymerization initiating and enhancing elements positioned between substrates | Jul 14, 2003 | Issued |
Array
(
[id] => 1059460
[patent_doc_number] => 06852550
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-02-08
[patent_title] => 'MRAM sense layer area control'
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[patent_app_number] => 10/617719
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[firstpage_image] =>[orig_patent_app_number] => 10617719
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/617719 | MRAM sense layer area control | Jul 13, 2003 | Issued |
Array
(
[id] => 7086683
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[patent_title] => 'Corner free structure of nonvolatile memory'
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[firstpage_image] =>[orig_patent_app_number] => 10614892
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/614892 | Corner free structure of nonvolatile memory | Jul 8, 2003 | Abandoned |
Array
(
[id] => 7360376
[patent_doc_number] => 20040004877
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[patent_title] => 'Semiconductor storage device with signal wiring lines RMED above memory cells'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/612992 | Semiconductor storage device with signal wiring lines RMED above memory cells | Jul 6, 2003 | Issued |
Array
(
[id] => 7375295
[patent_doc_number] => 20040178428
[patent_country] => US
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[patent_issue_date] => 2004-09-16
[patent_title] => 'Organic device including semiconducting layer aligned according to microgrooves of photoresist layer'
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[patent_app_number] => 10/613200
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/613200 | Organic device including semiconducting layer aligned according to microgrooves of photoresist layer | Jul 2, 2003 | Issued |
Array
(
[id] => 783393
[patent_doc_number] => 06992342
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Array
(
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Array
(
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[firstpage_image] =>[orig_patent_app_number] => 10611600
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/611600 | Method to enhance performance of thermal resistor device | Jun 30, 2003 | Issued |
Array
(
[id] => 1106081
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[patent_title] => 'Thin-film transistor, panel, and methods for producing them'
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[pdf_file] => patents/06/812/06812490.pdf
[firstpage_image] =>[orig_patent_app_number] => 10608000
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/608000 | Thin-film transistor, panel, and methods for producing them | Jun 29, 2003 | Issued |