Search

Eric Nilsson

Examiner (ID: 449, Phone: (571)272-5246 , Office: P/2122 )

Most Active Art Unit
2122
Art Unit(s)
2122, 2151, 2198
Total Applications
584
Issued Applications
436
Pending Applications
68
Abandoned Applications
84

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 703062 [patent_doc_number] => 07064379 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-06-20 [patent_title] => 'Nonvolatile semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 10/873296 [patent_app_country] => US [patent_app_date] => 2004-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 49 [patent_figures_cnt] => 169 [patent_no_of_words] => 13270 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/064/07064379.pdf [firstpage_image] =>[orig_patent_app_number] => 10873296 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/873296
Nonvolatile semiconductor memory device Jun 22, 2004 Issued
Array ( [id] => 6929050 [patent_doc_number] => 20050280083 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-22 [patent_title] => 'Standby current reduction over a process window with a trimmable well bias' [patent_app_type] => utility [patent_app_number] => 10/873010 [patent_app_country] => US [patent_app_date] => 2004-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5268 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0280/20050280083.pdf [firstpage_image] =>[orig_patent_app_number] => 10873010 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/873010
Standby current reduction over a process window with a trimmable well bias Jun 21, 2004 Issued
Array ( [id] => 7058901 [patent_doc_number] => 20050001260 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-06 [patent_title] => 'EEPROM device and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 10/872858 [patent_app_country] => US [patent_app_date] => 2004-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6518 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0001/20050001260.pdf [firstpage_image] =>[orig_patent_app_number] => 10872858 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/872858
EEPROM device and method of fabricating the same Jun 20, 2004 Issued
Array ( [id] => 703145 [patent_doc_number] => 07064419 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-06-20 [patent_title] => 'Die attach region for use in a micro-array integrated circuit package' [patent_app_type] => utility [patent_app_number] => 10/871320 [patent_app_country] => US [patent_app_date] => 2004-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 5294 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/064/07064419.pdf [firstpage_image] =>[orig_patent_app_number] => 10871320 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/871320
Die attach region for use in a micro-array integrated circuit package Jun 17, 2004 Issued
Array ( [id] => 708623 [patent_doc_number] => 07061042 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-06-13 [patent_title] => 'Double-cell memory device' [patent_app_type] => utility [patent_app_number] => 10/871170 [patent_app_country] => US [patent_app_date] => 2004-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 42 [patent_no_of_words] => 6600 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/061/07061042.pdf [firstpage_image] =>[orig_patent_app_number] => 10871170 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/871170
Double-cell memory device Jun 17, 2004 Issued
Array ( [id] => 7147999 [patent_doc_number] => 20050023675 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-03 [patent_title] => 'Semiconductor device and manufacturing method of the same' [patent_app_type] => utility [patent_app_number] => 10/870440 [patent_app_country] => US [patent_app_date] => 2004-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2775 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0023/20050023675.pdf [firstpage_image] =>[orig_patent_app_number] => 10870440 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/870440
Semiconductor device and manufacturing method of the same Jun 17, 2004 Issued
Array ( [id] => 708683 [patent_doc_number] => 07061069 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-06-13 [patent_title] => 'Semiconductor device having two-layered charge storage electrode' [patent_app_type] => utility [patent_app_number] => 10/869392 [patent_app_country] => US [patent_app_date] => 2004-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 66 [patent_no_of_words] => 15860 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/061/07061069.pdf [firstpage_image] =>[orig_patent_app_number] => 10869392 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/869392
Semiconductor device having two-layered charge storage electrode Jun 16, 2004 Issued
Array ( [id] => 7273003 [patent_doc_number] => 20040232454 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-25 [patent_title] => 'Group III nitride compound semiconductor device' [patent_app_type] => new [patent_app_number] => 10/869629 [patent_app_country] => US [patent_app_date] => 2004-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 13260 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 3 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0232/20040232454.pdf [firstpage_image] =>[orig_patent_app_number] => 10869629 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/869629
Group III nitride compound semiconductor device Jun 16, 2004 Issued
Array ( [id] => 708653 [patent_doc_number] => 07061057 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-06-13 [patent_title] => 'Laterally diffused MOS transistor having N+ source contact to N-doped substrate' [patent_app_type] => utility [patent_app_number] => 10/870720 [patent_app_country] => US [patent_app_date] => 2004-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 1616 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/061/07061057.pdf [firstpage_image] =>[orig_patent_app_number] => 10870720 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/870720
Laterally diffused MOS transistor having N+ source contact to N-doped substrate Jun 15, 2004 Issued
Array ( [id] => 954094 [patent_doc_number] => 06958509 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-10-25 [patent_title] => 'Integrated semiconductor product comprising a metal-insulator-metal capacitor' [patent_app_type] => utility [patent_app_number] => 10/865000 [patent_app_country] => US [patent_app_date] => 2004-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3771 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/958/06958509.pdf [firstpage_image] =>[orig_patent_app_number] => 10865000 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/865000
Integrated semiconductor product comprising a metal-insulator-metal capacitor Jun 9, 2004 Issued
Array ( [id] => 7315790 [patent_doc_number] => 20040223357 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-11 [patent_title] => 'Multiple data state memory cell' [patent_app_type] => new [patent_app_number] => 10/864419 [patent_app_country] => US [patent_app_date] => 2004-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3157 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 3 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0223/20040223357.pdf [firstpage_image] =>[orig_patent_app_number] => 10864419 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/864419
Method of forming and storing data in a multiple state memory cell Jun 9, 2004 Issued
Array ( [id] => 7314213 [patent_doc_number] => 20040222415 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-11 [patent_title] => 'Organic device including semiconducting layer aligned according to microgrooves of photoresist layer' [patent_app_type] => new [patent_app_number] => 10/864775 [patent_app_country] => US [patent_app_date] => 2004-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3791 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 3 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0222/20040222415.pdf [firstpage_image] =>[orig_patent_app_number] => 10864775 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/864775
Organic device including semiconducting layer aligned according to microgrooves of photoresist layer Jun 8, 2004 Issued
Array ( [id] => 698819 [patent_doc_number] => 07067351 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-06-27 [patent_title] => 'Selectively-etched nanochannel electrophoretic and electrochemical devices' [patent_app_type] => utility [patent_app_number] => 10/864778 [patent_app_country] => US [patent_app_date] => 2004-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2526 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/067/07067351.pdf [firstpage_image] =>[orig_patent_app_number] => 10864778 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/864778
Selectively-etched nanochannel electrophoretic and electrochemical devices Jun 7, 2004 Issued
Array ( [id] => 7362972 [patent_doc_number] => 20040217383 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-04 [patent_title] => 'Selective filtering of wavelength-converted semiconductor light emitting devices' [patent_app_type] => new [patent_app_number] => 10/855295 [patent_app_country] => US [patent_app_date] => 2004-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3171 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0217/20040217383.pdf [firstpage_image] =>[orig_patent_app_number] => 10855295 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/855295
Selective filtering of wavelength-converted semiconductor light emitting devices May 25, 2004 Issued
Array ( [id] => 7617130 [patent_doc_number] => 06946310 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-09-20 [patent_title] => 'Display device' [patent_app_type] => utility [patent_app_number] => 10/853470 [patent_app_country] => US [patent_app_date] => 2004-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 44 [patent_no_of_words] => 12023 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/946/06946310.pdf [firstpage_image] =>[orig_patent_app_number] => 10853470 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/853470
Display device May 24, 2004 Issued
Array ( [id] => 769027 [patent_doc_number] => 07005334 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-02-28 [patent_title] => 'Zero threshold voltage pFET and method of making same' [patent_app_type] => utility [patent_app_number] => 10/845835 [patent_app_country] => US [patent_app_date] => 2004-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 2591 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/005/07005334.pdf [firstpage_image] =>[orig_patent_app_number] => 10845835 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/845835
Zero threshold voltage pFET and method of making same May 13, 2004 Issued
Array ( [id] => 767226 [patent_doc_number] => 07009279 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-03-07 [patent_title] => 'Semiconductor device configured for suppressed germanium diffusion from a germanium-doped regions and a method for fabrication thereof' [patent_app_type] => utility [patent_app_number] => 10/845290 [patent_app_country] => US [patent_app_date] => 2004-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 6035 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/009/07009279.pdf [firstpage_image] =>[orig_patent_app_number] => 10845290 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/845290
Semiconductor device configured for suppressed germanium diffusion from a germanium-doped regions and a method for fabrication thereof May 11, 2004 Issued
Array ( [id] => 978897 [patent_doc_number] => 06929960 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-16 [patent_title] => 'Reducing the effects of neel coupling in MRAM structures' [patent_app_type] => utility [patent_app_number] => 10/839354 [patent_app_country] => US [patent_app_date] => 2004-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3597 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/929/06929960.pdf [firstpage_image] =>[orig_patent_app_number] => 10839354 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/839354
Reducing the effects of neel coupling in MRAM structures May 5, 2004 Issued
Array ( [id] => 761943 [patent_doc_number] => 07012284 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-03-14 [patent_title] => 'Nitride semiconductor light emitting device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 10/837780 [patent_app_country] => US [patent_app_date] => 2004-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3365 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/012/07012284.pdf [firstpage_image] =>[orig_patent_app_number] => 10837780 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/837780
Nitride semiconductor light emitting device and method of manufacturing the same May 3, 2004 Issued
Array ( [id] => 7058967 [patent_doc_number] => 20050001326 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-06 [patent_title] => 'Semiconductor device, stacked semiconductor device, methods of manufacturing the same, circuit board, and electronic instrument' [patent_app_type] => utility [patent_app_number] => 10/836200 [patent_app_country] => US [patent_app_date] => 2004-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 10840 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0001/20050001326.pdf [firstpage_image] =>[orig_patent_app_number] => 10836200 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/836200
Semiconductor device, stacked semiconductor device, methods of manufacturing the same, circuit board, and electronic instrument May 2, 2004 Issued
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