Search

Eric R. Netzloff

Examiner (ID: 13772)

Most Active Art Unit
3688
Art Unit(s)
3682, 3688
Total Applications
348
Issued Applications
95
Pending Applications
2
Abandoned Applications
251

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14542241 [patent_doc_number] => 20190206742 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-04 [patent_title] => SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/234340 [patent_app_country] => US [patent_app_date] => 2018-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4502 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16234340 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/234340
Semiconductor device and fabrication method thereof Dec 26, 2018 Issued
Array ( [id] => 16417881 [patent_doc_number] => 10825782 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-03 [patent_title] => Semiconductor packages and associated methods with solder mask opening(s) for in-package ground and conformal coating contact [patent_app_type] => utility [patent_app_number] => 16/234068 [patent_app_country] => US [patent_app_date] => 2018-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5660 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16234068 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/234068
Semiconductor packages and associated methods with solder mask opening(s) for in-package ground and conformal coating contact Dec 26, 2018 Issued
Array ( [id] => 16625095 [patent_doc_number] => 20210043748 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-11 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/964230 [patent_app_country] => US [patent_app_date] => 2018-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7874 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16964230 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/964230
Semiconductor device Dec 25, 2018 Issued
Array ( [id] => 14446499 [patent_doc_number] => 20190181123 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-13 [patent_title] => IN-VEHICLE DISPLAY DEVICE USING SEMICONDUCTOR LIGHT-EMITTING DEVICE [patent_app_type] => utility [patent_app_number] => 16/213348 [patent_app_country] => US [patent_app_date] => 2018-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4214 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16213348 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/213348
In-vehicle display device using semiconductor light-emitting device Dec 6, 2018 Issued
Array ( [id] => 15955413 [patent_doc_number] => 10665622 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-26 [patent_title] => Manufacturing method of array substrate and array substrate [patent_app_type] => utility [patent_app_number] => 16/203785 [patent_app_country] => US [patent_app_date] => 2018-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3491 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16203785 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/203785
Manufacturing method of array substrate and array substrate Nov 28, 2018 Issued
Array ( [id] => 14110395 [patent_doc_number] => 20190096873 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-28 [patent_title] => RF POWER DEVICE CAPABLE OF MONITORING TEMPERATURE AND RF CHARACTERISTICS AT WAFER LEVEL [patent_app_type] => utility [patent_app_number] => 16/202371 [patent_app_country] => US [patent_app_date] => 2018-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3038 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16202371 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/202371
RF power device capable of monitoring temperature and RF characteristics at wafer level Nov 27, 2018 Issued
Array ( [id] => 16448432 [patent_doc_number] => 10840363 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-17 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 16/202094 [patent_app_country] => US [patent_app_date] => 2018-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 21388 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16202094 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/202094
Semiconductor device Nov 27, 2018 Issued
Array ( [id] => 14079695 [patent_doc_number] => 20190088735 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-21 [patent_title] => Vertical Semiconductor Structure [patent_app_type] => utility [patent_app_number] => 16/197011 [patent_app_country] => US [patent_app_date] => 2018-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5006 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16197011 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/197011
Vertical semiconductor structure Nov 19, 2018 Issued
Array ( [id] => 17048196 [patent_doc_number] => 11101387 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-24 [patent_title] => Low temperature polysilicon layer, thin film transistor, and method for manufacturing same [patent_app_type] => utility [patent_app_number] => 16/344018 [patent_app_country] => US [patent_app_date] => 2018-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 15 [patent_no_of_words] => 6229 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16344018 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/344018
Low temperature polysilicon layer, thin film transistor, and method for manufacturing same Nov 18, 2018 Issued
Array ( [id] => 15807721 [patent_doc_number] => 20200127003 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-23 [patent_title] => THREE-DIMENSIONAL MEMORY DEVICE HAVING ZIGZAG SLIT STRUCTURES AND METHOD FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 16/195835 [patent_app_country] => US [patent_app_date] => 2018-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10070 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16195835 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/195835
Three-dimensional memory device having zigzag slit structures and method for forming the same Nov 18, 2018 Issued
Array ( [id] => 16417946 [patent_doc_number] => 10825847 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-03 [patent_title] => Solid-state imaging element [patent_app_type] => utility [patent_app_number] => 16/195436 [patent_app_country] => US [patent_app_date] => 2018-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 4449 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16195436 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/195436
Solid-state imaging element Nov 18, 2018 Issued
Array ( [id] => 16774013 [patent_doc_number] => 10985134 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-20 [patent_title] => Method and system of manufacturing stacked wafers [patent_app_type] => utility [patent_app_number] => 16/186100 [patent_app_country] => US [patent_app_date] => 2018-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 5081 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16186100 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/186100
Method and system of manufacturing stacked wafers Nov 8, 2018 Issued
Array ( [id] => 15218185 [patent_doc_number] => 20190371779 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-05 [patent_title] => METHOD OF MANUFACTURING DISPLAY MODULE USING LED [patent_app_type] => utility [patent_app_number] => 16/185602 [patent_app_country] => US [patent_app_date] => 2018-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5518 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 245 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16185602 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/185602
Method of manufacturing display module using LED Nov 8, 2018 Issued
Array ( [id] => 15045811 [patent_doc_number] => 20190333910 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-31 [patent_title] => METHODS OF STACKING SEMICONDUCTOR DIES [patent_app_type] => utility [patent_app_number] => 16/186344 [patent_app_country] => US [patent_app_date] => 2018-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8074 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16186344 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/186344
Methods of stacking semiconductor dies Nov 8, 2018 Issued
Array ( [id] => 16048295 [patent_doc_number] => 10686033 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-16 [patent_title] => Fin damage reduction during punch through implantation of FinFET device [patent_app_type] => utility [patent_app_number] => 16/186027 [patent_app_country] => US [patent_app_date] => 2018-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 3997 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16186027 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/186027
Fin damage reduction during punch through implantation of FinFET device Nov 8, 2018 Issued
Array ( [id] => 14968949 [patent_doc_number] => 20190311953 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-10 [patent_title] => Methods of Fabricating Semiconductor Devices Including Differing Barrier Layer Structures [patent_app_type] => utility [patent_app_number] => 16/185213 [patent_app_country] => US [patent_app_date] => 2018-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6440 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16185213 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/185213
Methods of fabricating semiconductor devices including differing barrier layer structures Nov 8, 2018 Issued
Array ( [id] => 15905997 [patent_doc_number] => 20200152519 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-14 [patent_title] => FIN DAMAGE REDUCTION DURING PUNCH THROUGH IMPLANTATION OF FINFET DEVICE [patent_app_type] => utility [patent_app_number] => 16/186004 [patent_app_country] => US [patent_app_date] => 2018-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4065 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16186004 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/186004
Fin damage reduction during punch through implantation of FinFET device Nov 8, 2018 Issued
Array ( [id] => 14024403 [patent_doc_number] => 20190074195 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-07 [patent_title] => ELECTRONIC PACKAGE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/177446 [patent_app_country] => US [patent_app_date] => 2018-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3763 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16177446 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/177446
Electronic package and manufacturing method thereof Oct 31, 2018 Issued
Array ( [id] => 16249407 [patent_doc_number] => 10748782 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-18 [patent_title] => Method of manufacturing semiconductor device [patent_app_type] => utility [patent_app_number] => 16/165250 [patent_app_country] => US [patent_app_date] => 2018-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 51 [patent_no_of_words] => 7726 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16165250 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/165250
Method of manufacturing semiconductor device Oct 18, 2018 Issued
Array ( [id] => 16448153 [patent_doc_number] => 10840084 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-17 [patent_title] => Method of manufacturing semiconductor device and substrate processing apparatus [patent_app_type] => utility [patent_app_number] => 16/165176 [patent_app_country] => US [patent_app_date] => 2018-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 30 [patent_no_of_words] => 8128 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16165176 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/165176
Method of manufacturing semiconductor device and substrate processing apparatus Oct 18, 2018 Issued
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