Search

Eric T. Loonan

Examiner (ID: 16135, Phone: (571)272-6994 , Office: P/2131 )

Most Active Art Unit
2137
Art Unit(s)
2131, 2189, 2137, 2109
Total Applications
487
Issued Applications
287
Pending Applications
49
Abandoned Applications
160

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20500487 [patent_doc_number] => 20260029947 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-29 [patent_title] => CROSS TEMPERATURE COLLECTION AND REPORTING IN A MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 19/270081 [patent_app_country] => US [patent_app_date] => 2025-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8308 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19270081 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/270081
CROSS TEMPERATURE COLLECTION AND REPORTING IN A MEMORY SYSTEM Jul 14, 2025 Pending
Array ( [id] => 20337857 [patent_doc_number] => 20250341977 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-11-06 [patent_title] => TECHNIQUES FOR MEMORY ZONE SIZE ADJUSTMENT [patent_app_type] => utility [patent_app_number] => 19/209159 [patent_app_country] => US [patent_app_date] => 2025-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10204 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19209159 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/209159
TECHNIQUES FOR MEMORY ZONE SIZE ADJUSTMENT May 14, 2025 Pending
Array ( [id] => 20421729 [patent_doc_number] => 20250383814 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-12-18 [patent_title] => Sub Block Access via Memory Namespace Command Set [patent_app_type] => utility [patent_app_number] => 19/181903 [patent_app_country] => US [patent_app_date] => 2025-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8920 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19181903 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/181903
Sub Block Access via Memory Namespace Command Set Apr 16, 2025 Pending
Array ( [id] => 20513024 [patent_doc_number] => 20260037125 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-02-05 [patent_title] => STORAGE SYSTEM [patent_app_type] => utility [patent_app_number] => 19/078829 [patent_app_country] => US [patent_app_date] => 2025-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4582 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19078829 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/078829
STORAGE SYSTEM Mar 12, 2025 Pending
Array ( [id] => 20601823 [patent_doc_number] => 20260079833 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-03-19 [patent_title] => MEMORY SYSTEM AND CONTROL METHOD [patent_app_type] => utility [patent_app_number] => 19/077862 [patent_app_country] => US [patent_app_date] => 2025-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7990 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19077862 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/077862
MEMORY SYSTEM AND CONTROL METHOD Mar 11, 2025 Pending
Array ( [id] => 20601625 [patent_doc_number] => 20260079634 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-03-19 [patent_title] => INFORMATION PROCESSING SYSTEM AND MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 19/067480 [patent_app_country] => US [patent_app_date] => 2025-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3728 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19067480 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/067480
INFORMATION PROCESSING SYSTEM AND MEMORY SYSTEM Feb 27, 2025 Pending
Array ( [id] => 20461056 [patent_doc_number] => 20260010484 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-08 [patent_title] => SYSTEM-ON-CHIP AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 19/048403 [patent_app_country] => US [patent_app_date] => 2025-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3627 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19048403 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/048403
SYSTEM-ON-CHIP AND OPERATING METHOD THEREOF Feb 6, 2025 Pending
Array ( [id] => 20922465 [patent_doc_number] => 12717525 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-08-25 [patent_title] => Swapping a physical block of a virtual block based on a bit error rate of the physical block [patent_app_type] => utility [patent_app_number] => 19/031473 [patent_app_country] => US [patent_app_date] => 2025-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 1195 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19031473 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/031473
SWAPPING A PHYSICAL BLOCK OF A VIRTUAL BLOCK BASED ON A BIT ERROR RATE OF THE PHYSICAL BLOCK Jan 17, 2025 Pending
Array ( [id] => 20249648 [patent_doc_number] => 20250298517 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-25 [patent_title] => NON-VOLATILE MEMORY DEVICE, A STORAGE DEVICE INCLUDING THE NON-VOLATILE MEMORY DEVICE AND A METHOD OF OPERATING THE STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 19/029778 [patent_app_country] => US [patent_app_date] => 2025-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11758 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19029778 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/029778
NON-VOLATILE MEMORY DEVICE, A STORAGE DEVICE INCLUDING THE NON-VOLATILE MEMORY DEVICE AND A METHOD OF OPERATING THE STORAGE DEVICE Jan 16, 2025 Pending
Array ( [id] => 20421719 [patent_doc_number] => 20250383804 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-12-18 [patent_title] => MEMORY MANAGEMENT METHOD AND MEMORY CONTROLLER [patent_app_type] => utility [patent_app_number] => 19/019470 [patent_app_country] => US [patent_app_date] => 2025-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3310 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19019470 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/019470
MEMORY MANAGEMENT METHOD AND MEMORY CONTROLLER Jan 13, 2025 Pending
Array ( [id] => 20181048 [patent_doc_number] => 20250265006 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-21 [patent_title] => MEMORY STORAGE APPARATUS AND METHOD FOR OPERATING MEMORY STORAGE APPARATUS [patent_app_type] => utility [patent_app_number] => 19/019543 [patent_app_country] => US [patent_app_date] => 2025-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19019543 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/019543
MEMORY STORAGE APPARATUS AND METHOD FOR OPERATING MEMORY STORAGE APPARATUS Jan 13, 2025 Pending
Array ( [id] => 20395183 [patent_doc_number] => 20250370658 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-12-04 [patent_title] => COMMAND PROCESSING METHOD, ELECTRONIC DEVICE, AND NON-TRANSITORY COMPUTER-READABLE RECORDING MEDIUM [patent_app_type] => utility [patent_app_number] => 19/019403 [patent_app_country] => US [patent_app_date] => 2025-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19019403 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/019403
COMMAND PROCESSING METHOD, ELECTRONIC DEVICE, AND NON-TRANSITORY COMPUTER-READABLE RECORDING MEDIUM Jan 12, 2025 Pending
Array ( [id] => 20101761 [patent_doc_number] => 20250231697 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-17 [patent_title] => Memory access circuit and method having secure access mechanism [patent_app_type] => utility [patent_app_number] => 19/003225 [patent_app_country] => US [patent_app_date] => 2024-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2188 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19003225 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/003225
Memory access circuit and method having secure access mechanism Dec 26, 2024 Pending
Array ( [id] => 20513324 [patent_doc_number] => 20260037425 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-02-05 [patent_title] => GENERATING A LOGICAL TO PHYSICAL DATA STRUCTURE STORED BY A HOST DEVICE [patent_app_type] => utility [patent_app_number] => 19/002635 [patent_app_country] => US [patent_app_date] => 2024-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4566 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19002635 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/002635
GENERATING A LOGICAL TO PHYSICAL DATA STRUCTURE STORED BY A HOST DEVICE Dec 25, 2024 Pending
Array ( [id] => 20914216 [patent_doc_number] => 12711061 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-08-18 [patent_title] => Memory management among multiple erase blocks coupled to a same string [patent_app_type] => utility [patent_app_number] => 18/965377 [patent_app_country] => US [patent_app_date] => 2024-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2407 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18965377 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/965377
MEMORY MANAGEMENT AMONG MULTIPLE ERASE BLOCKS COUPLED TO A SAME STRING Dec 1, 2024 Pending
Array ( [id] => 19819234 [patent_doc_number] => 20250077441 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-06 [patent_title] => CACHING USING MACHINE LEARNED PREDICTIONS [patent_app_type] => utility [patent_app_number] => 18/949822 [patent_app_country] => US [patent_app_date] => 2024-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12115 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 406 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18949822 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/949822
CACHING USING MACHINE LEARNED PREDICTIONS Nov 14, 2024 Pending
Array ( [id] => 20026936 [patent_doc_number] => 20250165158 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-22 [patent_title] => CONFIGURATION METHOD FOR A PHASE-CHANGE NON-VOLATILE MEMORY [patent_app_type] => utility [patent_app_number] => 18/940372 [patent_app_country] => US [patent_app_date] => 2024-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1096 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18940372 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/940372
Configuration method for a phase-change non-volatile memory Nov 6, 2024 Issued
Array ( [id] => 20323027 [patent_doc_number] => 20250335115 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-30 [patent_title] => METHOD AND SYSTEM FOR MIGRATING FILE [patent_app_type] => utility [patent_app_number] => 18/929881 [patent_app_country] => US [patent_app_date] => 2024-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3797 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18929881 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/929881
METHOD AND SYSTEM FOR MIGRATING FILE Oct 28, 2024 Pending
Array ( [id] => 20680249 [patent_doc_number] => 20260119067 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-04-30 [patent_title] => Live Container Migration with Minimal Production System Impact [patent_app_type] => utility [patent_app_number] => 18/929770 [patent_app_country] => US [patent_app_date] => 2024-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3236 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 339 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18929770 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/929770
Live container migration with minimal production system impact Oct 28, 2024 Issued
Array ( [id] => 19644841 [patent_doc_number] => 20240419361 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-19 [patent_title] => PERSISTENT XSPI STT-MRAM WITH OPTIONAL ERASE OPERATION [patent_app_type] => utility [patent_app_number] => 18/812443 [patent_app_country] => US [patent_app_date] => 2024-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6764 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18812443 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/812443
PERSISTENT XSPI STT-MRAM WITH OPTIONAL ERASE OPERATION Aug 21, 2024 Issued
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