Search

Eric T. Oberly

Examiner (ID: 18801, Phone: (571)272-6991 , Office: P/2184 )

Most Active Art Unit
2184
Art Unit(s)
2184
Total Applications
681
Issued Applications
497
Pending Applications
41
Abandoned Applications
153

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20475001 [patent_doc_number] => 20260017222 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-15 [patent_title] => CONTROLLERS, HOSTS, METHODS OF OPERATING CONTROLLERS, AND METHODS OF OPERATING HOSTS [patent_app_type] => utility [patent_app_number] => 19/011271 [patent_app_country] => US [patent_app_date] => 2025-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7369 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19011271 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/011271
CONTROLLERS, HOSTS, METHODS OF OPERATING CONTROLLERS, AND METHODS OF OPERATING HOSTS Jan 5, 2025 Pending
Array ( [id] => 19834351 [patent_doc_number] => 20250086137 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-13 [patent_title] => USB INTERFACE CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/960887 [patent_app_country] => US [patent_app_date] => 2024-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4825 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18960887 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/960887
USB INTERFACE CIRCUIT Nov 25, 2024 Pending
Array ( [id] => 20520350 [patent_doc_number] => 20260044458 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-02-12 [patent_title] => MEMORY SYSTEM INCLUDING ADAPTABLE PHYSICAL CONNECTIVITY [patent_app_type] => utility [patent_app_number] => 18/959126 [patent_app_country] => US [patent_app_date] => 2024-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4618 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18959126 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/959126
MEMORY SYSTEM INCLUDING ADAPTABLE PHYSICAL CONNECTIVITY Nov 24, 2024 Pending
Array ( [id] => 20323300 [patent_doc_number] => 20250335388 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-30 [patent_title] => MIPI CIRCUIT, CHIP AND ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 18/948799 [patent_app_country] => US [patent_app_date] => 2024-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1213 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18948799 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/948799
MIPI CIRCUIT, CHIP AND ELECTRONIC DEVICE Nov 14, 2024 Pending
Array ( [id] => 20035064 [patent_doc_number] => 20250173286 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-29 [patent_title] => Cross-die Interconnection Monitor Method and Cross-die Interconnection Monitor System Capable of Extracting Cross-die Interconnection Data for Multi-die Packages [patent_app_type] => utility [patent_app_number] => 18/946951 [patent_app_country] => US [patent_app_date] => 2024-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18946951 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/946951
Cross-die Interconnection Monitor Method and Cross-die Interconnection Monitor System Capable of Extracting Cross-die Interconnection Data for Multi-die Packages Nov 13, 2024 Pending
Array ( [id] => 19756655 [patent_doc_number] => 20250045220 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-06 [patent_title] => METHOD FOR CONTROLLING A TARGET MEMORY BY PROGRAMMABLY SELECTING AN ACTION EXECUTION CIRCUIT MODULE CORRESPONDING TO A TRIGGERED PRESET STATE [patent_app_type] => utility [patent_app_number] => 18/920372 [patent_app_country] => US [patent_app_date] => 2024-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8262 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 239 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18920372 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/920372
METHOD FOR CONTROLLING A TARGET MEMORY BY PROGRAMMABLY SELECTING AN ACTION EXECUTION CIRCUIT MODULE CORRESPONDING TO A TRIGGERED PRESET STATE Oct 17, 2024 Pending
Array ( [id] => 20152233 [patent_doc_number] => 20250252071 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-07 [patent_title] => ELECTRONIC SYSTEM AND OPERATING METHOD FOR ELECTRONIC SYSTEM [patent_app_type] => utility [patent_app_number] => 18/897163 [patent_app_country] => US [patent_app_date] => 2024-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18897163 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/897163
ELECTRONIC SYSTEM AND OPERATING METHOD FOR ELECTRONIC SYSTEM Sep 25, 2024 Pending
Array ( [id] => 19695054 [patent_doc_number] => 20250013599 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-09 [patent_title] => COMMUNICATIONS METHOD, DEVICE, AND SYSTEM [patent_app_type] => utility [patent_app_number] => 18/895036 [patent_app_country] => US [patent_app_date] => 2024-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12221 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18895036 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/895036
COMMUNICATIONS METHOD, DEVICE, AND SYSTEM Sep 23, 2024 Pending
Array ( [id] => 19644822 [patent_doc_number] => 20240419342 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-19 [patent_title] => MEMORY SYSTEM AND METHOD FOR OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/815839 [patent_app_country] => US [patent_app_date] => 2024-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6226 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18815839 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/815839
MEMORY SYSTEM AND METHOD FOR OPERATING THE SAME Aug 26, 2024 Pending
Array ( [id] => 20513353 [patent_doc_number] => 20260037454 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-02-05 [patent_title] => COMMUNICATION BETWEEN A COMPUTING ELEMENT OF A MEMORY DEVICE AND AN ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 18/791987 [patent_app_country] => US [patent_app_date] => 2024-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7803 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18791987 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/791987
COMMUNICATION BETWEEN A COMPUTING ELEMENT OF A MEMORY DEVICE AND AN ELECTRONIC DEVICE Jul 31, 2024 Pending
Array ( [id] => 19695049 [patent_doc_number] => 20250013594 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-09 [patent_title] => IO PROCESSING METHOD AND APPARATUS [patent_app_type] => utility [patent_app_number] => 18/770598 [patent_app_country] => US [patent_app_date] => 2024-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15413 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18770598 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/770598
IO PROCESSING METHOD AND APPARATUS Jul 10, 2024 Pending
Array ( [id] => 19530128 [patent_doc_number] => 20240354030 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-24 [patent_title] => STORAGE DEVICE SET INCLUDING STORAGE DEVICE AND RECONFIGURABLE LOGIC CHIP, AND STORAGE SYSTEM INCLUDING STORAGE DEVICE SET [patent_app_type] => utility [patent_app_number] => 18/760205 [patent_app_country] => US [patent_app_date] => 2024-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11142 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18760205 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/760205
STORAGE DEVICE SET INCLUDING STORAGE DEVICE AND RECONFIGURABLE LOGIC CHIP, AND STORAGE SYSTEM INCLUDING STORAGE DEVICE SET Jun 30, 2024 Pending
Array ( [id] => 20395014 [patent_doc_number] => 20250370489 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-12-04 [patent_title] => POWER DELIVERY SYSTEM [patent_app_type] => utility [patent_app_number] => 18/744706 [patent_app_country] => US [patent_app_date] => 2024-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18744706 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/744706
POWER DELIVERY SYSTEM Jun 16, 2024 Pending
Array ( [id] => 20421919 [patent_doc_number] => 20250384004 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-12-18 [patent_title] => FEATURE MANAGEMENT FOR INPUT/OUTPUT (I/O) ADAPTERS [patent_app_type] => utility [patent_app_number] => 18/744032 [patent_app_country] => US [patent_app_date] => 2024-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3451 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18744032 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/744032
FEATURE MANAGEMENT FOR INPUT/OUTPUT (I/O) ADAPTERS Jun 13, 2024 Pending
Array ( [id] => 20380536 [patent_doc_number] => 20250363029 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-11-27 [patent_title] => BMC/MULTI-GPU MONITORING/MANAGEMENT SYSTEM [patent_app_type] => utility [patent_app_number] => 18/672329 [patent_app_country] => US [patent_app_date] => 2024-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4685 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18672329 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/672329
BMC/multi-GPU monitoring/management system May 22, 2024 Issued
Array ( [id] => 20159881 [patent_doc_number] => 12386507 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-12 [patent_title] => Creation and use of an efficiency set to estimate an amount of data stored in a data set of a storage system having one or more characteristics [patent_app_type] => utility [patent_app_number] => 18/672641 [patent_app_country] => US [patent_app_date] => 2024-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 7550 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18672641 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/672641
Creation and use of an efficiency set to estimate an amount of data stored in a data set of a storage system having one or more characteristics May 22, 2024 Issued
Array ( [id] => 19603320 [patent_doc_number] => 20240394200 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-28 [patent_title] => HBM OR OTHER TYPE MEMORY WITH FLC SYSTEM [patent_app_type] => utility [patent_app_number] => 18/669389 [patent_app_country] => US [patent_app_date] => 2024-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 38429 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18669389 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/669389
HBM OR OTHER TYPE MEMORY WITH FLC SYSTEM May 19, 2024 Pending
Array ( [id] => 20529122 [patent_doc_number] => 12547557 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-10 [patent_title] => System and method for facilitating efficient event notification management for a network interface controller (NIC) [patent_app_type] => utility [patent_app_number] => 18/655405 [patent_app_country] => US [patent_app_date] => 2024-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 1132 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18655405 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/655405
System and method for facilitating efficient event notification management for a network interface controller (NIC) May 5, 2024 Issued
Array ( [id] => 20249894 [patent_doc_number] => 20250298763 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-25 [patent_title] => MAPPING ABSTRACT DATA MOVEMENTS INTO SEQUENTIAL AND PARALLEL DIRECT MEMORY ACCESS (DMA) PROGRAMMING [patent_app_type] => utility [patent_app_number] => 18/631701 [patent_app_country] => US [patent_app_date] => 2024-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 23825 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18631701 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/631701
MAPPING ABSTRACT DATA MOVEMENTS INTO SEQUENTIAL AND PARALLEL DIRECT MEMORY ACCESS (DMA) PROGRAMMING Apr 9, 2024 Pending
Array ( [id] => 20196401 [patent_doc_number] => 20250273111 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-28 [patent_title] => DISPLAY AND DATA CONFIGURATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/629385 [patent_app_country] => US [patent_app_date] => 2024-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18629385 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/629385
DISPLAY AND DATA CONFIGURATION METHOD THEREOF Apr 7, 2024 Pending
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