Search

Eric T. Oberly

Examiner (ID: 5591, Phone: (571)272-6991 , Office: P/2184 )

Most Active Art Unit
2184
Art Unit(s)
2184
Total Applications
692
Issued Applications
505
Pending Applications
44
Abandoned Applications
152

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10816261 [patent_doc_number] => 20160162422 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-09 [patent_title] => 'DUAL ACCESS MEMORY MAPPED DATA STRUCTURE MEMORY' [patent_app_type] => utility [patent_app_number] => 14/563507 [patent_app_country] => US [patent_app_date] => 2014-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6956 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14563507 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/563507
Dual access memory mapped data structure memory Dec 7, 2014 Issued
Array ( [id] => 10817119 [patent_doc_number] => 20160163281 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-09 [patent_title] => 'FILTERING HOT PLUG DETECT SIGNALS' [patent_app_type] => utility [patent_app_number] => 14/563834 [patent_app_country] => US [patent_app_date] => 2014-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5283 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14563834 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/563834
Filtering hot plug detect signals Dec 7, 2014 Issued
Array ( [id] => 12146497 [patent_doc_number] => 09880750 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-01-30 [patent_title] => 'Storage architecture for storage class memories' [patent_app_type] => utility [patent_app_number] => 14/562110 [patent_app_country] => US [patent_app_date] => 2014-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 16 [patent_no_of_words] => 9536 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14562110 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/562110
Storage architecture for storage class memories Dec 4, 2014 Issued
Array ( [id] => 12311700 [patent_doc_number] => 09940279 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-04-10 [patent_title] => Processor apparatus with programmable multi port serial communication interconnections [patent_app_type] => utility [patent_app_number] => 14/552471 [patent_app_country] => US [patent_app_date] => 2014-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 6381 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14552471 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/552471
Processor apparatus with programmable multi port serial communication interconnections Nov 23, 2014 Issued
Array ( [id] => 11752408 [patent_doc_number] => 09710420 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-07-18 [patent_title] => 'System and method for improving the efficiency of a serial interface protocol' [patent_app_type] => utility [patent_app_number] => 14/550829 [patent_app_country] => US [patent_app_date] => 2014-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5505 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14550829 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/550829
System and method for improving the efficiency of a serial interface protocol Nov 20, 2014 Issued
Array ( [id] => 10787880 [patent_doc_number] => 20160134036 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-05-12 [patent_title] => 'SIGNAL INTEGRITY IN MUTLI-JUNCTION TOPOLOGIES' [patent_app_type] => utility [patent_app_number] => 14/539597 [patent_app_country] => US [patent_app_date] => 2014-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7462 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14539597 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/539597
SIGNAL INTEGRITY IN MUTLI-JUNCTION TOPOLOGIES Nov 11, 2014 Abandoned
Array ( [id] => 10408868 [patent_doc_number] => 20150293876 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-15 [patent_title] => 'WIRELESS DOCKING WITH MULTIPLE WIRELESS DOCKING CENTERS' [patent_app_type] => utility [patent_app_number] => 14/539365 [patent_app_country] => US [patent_app_date] => 2014-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 10568 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14539365 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/539365
WIRELESS DOCKING WITH MULTIPLE WIRELESS DOCKING CENTERS Nov 11, 2014 Abandoned
Array ( [id] => 10786287 [patent_doc_number] => 20160132443 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-05-12 [patent_title] => 'TRACKING VIRTUAL MACHINE MEMORY MODIFIED BY A SINGLE ROOT I/O VIRTUALIZATION (SR-IOV) DEVICE' [patent_app_type] => utility [patent_app_number] => 14/539528 [patent_app_country] => US [patent_app_date] => 2014-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5425 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14539528 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/539528
Tracking virtual machine memory modified by a single root I/O virtualization (SR-IOV) device Nov 11, 2014 Issued
Array ( [id] => 10786301 [patent_doc_number] => 20160132456 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-05-12 [patent_title] => 'INTEGRATED ADAPTER FOR THIN COMPUTING DEVICES' [patent_app_type] => utility [patent_app_number] => 14/538674 [patent_app_country] => US [patent_app_date] => 2014-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 14596 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14538674 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/538674
INTEGRATED ADAPTER FOR THIN COMPUTING DEVICES Nov 10, 2014 Abandoned
Array ( [id] => 12088341 [patent_doc_number] => 09842071 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-12-12 [patent_title] => 'Multi-channel I2S transmit control system and method' [patent_app_type] => utility [patent_app_number] => 14/538133 [patent_app_country] => US [patent_app_date] => 2014-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5333 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14538133 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/538133
Multi-channel I2S transmit control system and method Nov 10, 2014 Issued
Array ( [id] => 10786298 [patent_doc_number] => 20160132454 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-05-12 [patent_title] => 'ADAPTER CARD FOR THIN COMPUTING DEVICES' [patent_app_type] => utility [patent_app_number] => 14/538662 [patent_app_country] => US [patent_app_date] => 2014-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 14845 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14538662 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/538662
ADAPTER CARD FOR THIN COMPUTING DEVICES Nov 10, 2014 Abandoned
Array ( [id] => 11700809 [patent_doc_number] => 09690726 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-06-27 [patent_title] => 'Peripheral register parameter refreshing' [patent_app_type] => utility [patent_app_number] => 14/538305 [patent_app_country] => US [patent_app_date] => 2014-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 2494 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14538305 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/538305
Peripheral register parameter refreshing Nov 10, 2014 Issued
Array ( [id] => 10786303 [patent_doc_number] => 20160132459 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-05-12 [patent_title] => 'In-Situ Die-to-Die Impedance Estimation for High-Speed Serial Links' [patent_app_type] => utility [patent_app_number] => 14/537011 [patent_app_country] => US [patent_app_date] => 2014-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3801 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14537011 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/537011
In-situ die-to-die impedance estimation for high-speed serial links Nov 9, 2014 Issued
Array ( [id] => 11910244 [patent_doc_number] => 09779055 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-03 [patent_title] => 'Integrated circuit device and signal processing method in integrated circuit device' [patent_app_type] => utility [patent_app_number] => 14/536213 [patent_app_country] => US [patent_app_date] => 2014-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3732 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14536213 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/536213
Integrated circuit device and signal processing method in integrated circuit device Nov 6, 2014 Issued
Array ( [id] => 12201586 [patent_doc_number] => 09904652 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-02-27 [patent_title] => 'System and method of sending data via additional secondary data lines on a bus' [patent_app_type] => utility [patent_app_number] => 14/535992 [patent_app_country] => US [patent_app_date] => 2014-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 14099 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14535992 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/535992
System and method of sending data via additional secondary data lines on a bus Nov 6, 2014 Issued
Array ( [id] => 10242869 [patent_doc_number] => 20150127865 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-05-07 [patent_title] => 'METHOD AND APPARATUS USE WITH INTERRUPTS' [patent_app_type] => utility [patent_app_number] => 14/536014 [patent_app_country] => US [patent_app_date] => 2014-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5580 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14536014 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/536014
Method and apparatus use with interrupts Nov 6, 2014 Issued
Array ( [id] => 10403409 [patent_doc_number] => 20150288419 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-08 [patent_title] => 'POWER LINE ETHERNET ADAPTOR AND POWER LINE ETHERNET COMMUNICATION KIT' [patent_app_type] => utility [patent_app_number] => 14/535814 [patent_app_country] => US [patent_app_date] => 2014-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4469 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14535814 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/535814
Power line ethernet adaptor and power line ethernet communication kit Nov 6, 2014 Issued
Array ( [id] => 15377753 [patent_doc_number] => 10530612 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-01-07 [patent_title] => Subscriber station for a bus system and method for reducing line-related emissions in a bus system [patent_app_type] => utility [patent_app_number] => 15/033919 [patent_app_country] => US [patent_app_date] => 2014-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2729 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15033919 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/033919
Subscriber station for a bus system and method for reducing line-related emissions in a bus system Oct 19, 2014 Issued
Array ( [id] => 15609551 [patent_doc_number] => 10585838 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-10 [patent_title] => Input/output device for an electronic cabinet and cabinet comprising such a device [patent_app_type] => utility [patent_app_number] => 15/036807 [patent_app_country] => US [patent_app_date] => 2014-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 3881 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15036807 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/036807
Input/output device for an electronic cabinet and cabinet comprising such a device Oct 15, 2014 Issued
Array ( [id] => 9814426 [patent_doc_number] => 20150026371 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-01-22 [patent_title] => 'TECHNIQUES FOR MIGRATING ACTIVE I/O CONNECTIONS WITH MIGRATING SERVERS AND CLIENTS' [patent_app_type] => utility [patent_app_number] => 14/510983 [patent_app_country] => US [patent_app_date] => 2014-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6003 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14510983 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/510983
Techniques for migrating active I/O connections with migrating servers and clients Oct 8, 2014 Issued
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