
Eric T. Oberly
Examiner (ID: 5591, Phone: (571)272-6991 , Office: P/2184 )
| Most Active Art Unit | 2184 |
| Art Unit(s) | 2184 |
| Total Applications | 692 |
| Issued Applications | 505 |
| Pending Applications | 44 |
| Abandoned Applications | 152 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 10569057
[patent_doc_number] => 09292225
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-03-22
[patent_title] => 'Methods for frame order control and devices in storage area network'
[patent_app_type] => utility
[patent_app_number] => 14/143242
[patent_app_country] => US
[patent_app_date] => 2013-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 7223
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 240
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14143242
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/143242 | Methods for frame order control and devices in storage area network | Dec 29, 2013 | Issued |
Array
(
[id] => 10085063
[patent_doc_number] => 09122411
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-09-01
[patent_title] => 'Signal order-preserving method and apparatus'
[patent_app_type] => utility
[patent_app_number] => 14/143101
[patent_app_country] => US
[patent_app_date] => 2013-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 6221
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 301
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14143101
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/143101 | Signal order-preserving method and apparatus | Dec 29, 2013 | Issued |
Array
(
[id] => 10301312
[patent_doc_number] => 20150186311
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-07-02
[patent_title] => 'SMART DIRECT MEMORY ACCESS'
[patent_app_type] => utility
[patent_app_number] => 14/142799
[patent_app_country] => US
[patent_app_date] => 2013-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 12418
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14142799
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/142799 | SMART DIRECT MEMORY ACCESS | Dec 27, 2013 | Abandoned |
Array
(
[id] => 10301319
[patent_doc_number] => 20150186320
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-07-02
[patent_title] => 'BACKWARD COMPATIBLE NEW FORM FACTOR CONNECTOR'
[patent_app_type] => utility
[patent_app_number] => 14/142208
[patent_app_country] => US
[patent_app_date] => 2013-12-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 5611
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14142208
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/142208 | BACKWARD COMPATIBLE NEW FORM FACTOR CONNECTOR | Dec 26, 2013 | Abandoned |
Array
(
[id] => 10303589
[patent_doc_number] => 20150188589
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-07-02
[patent_title] => 'HIGH SPEED SHORT REACH INPUT/OUTPUT (I/O)'
[patent_app_type] => utility
[patent_app_number] => 14/142595
[patent_app_country] => US
[patent_app_date] => 2013-12-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 5531
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14142595
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/142595 | High speed short reach input/output (I/O) | Dec 26, 2013 | Issued |
Array
(
[id] => 11563726
[patent_doc_number] => 09626316
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-04-18
[patent_title] => 'Managing shared resources between multiple processing devices'
[patent_app_type] => utility
[patent_app_number] => 14/141828
[patent_app_country] => US
[patent_app_date] => 2013-12-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 14931
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 28
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14141828
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/141828 | Managing shared resources between multiple processing devices | Dec 26, 2013 | Issued |
Array
(
[id] => 10301257
[patent_doc_number] => 20150186257
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-07-02
[patent_title] => 'MANAGING A TRANSFER BUFFER FOR A NON-VOLATILE MEMORY'
[patent_app_type] => utility
[patent_app_number] => 14/140919
[patent_app_country] => US
[patent_app_date] => 2013-12-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4502
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14140919
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/140919 | MANAGING A TRANSFER BUFFER FOR A NON-VOLATILE MEMORY | Dec 25, 2013 | Abandoned |
Array
(
[id] => 14708903
[patent_doc_number] => 10382223
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-08-13
[patent_title] => Scheme for supporting wireless transmission taking into account QoS of USB application data
[patent_app_type] => utility
[patent_app_number] => 15/033814
[patent_app_country] => US
[patent_app_date] => 2013-12-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 12
[patent_no_of_words] => 7321
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 205
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15033814
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/033814 | Scheme for supporting wireless transmission taking into account QoS of USB application data | Dec 23, 2013 | Issued |
Array
(
[id] => 10015259
[patent_doc_number] => 09058273
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2015-06-16
[patent_title] => 'Frequency determination across an interface of a data processing system'
[patent_app_type] => utility
[patent_app_number] => 14/137127
[patent_app_country] => US
[patent_app_date] => 2013-12-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 21
[patent_no_of_words] => 12507
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 157
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14137127
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/137127 | Frequency determination across an interface of a data processing system | Dec 19, 2013 | Issued |
Array
(
[id] => 15981963
[patent_doc_number] => 10671309
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2020-06-02
[patent_title] => Predicting usage for automated storage tiering
[patent_app_type] => utility
[patent_app_number] => 14/133892
[patent_app_country] => US
[patent_app_date] => 2013-12-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 29
[patent_figures_cnt] => 33
[patent_no_of_words] => 19052
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 324
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14133892
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/133892 | Predicting usage for automated storage tiering | Dec 18, 2013 | Issued |
Array
(
[id] => 10293016
[patent_doc_number] => 20150178015
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-06-25
[patent_title] => 'DYNAMIC FEEDBACK-BASED THROUGHPUT CONTROL FOR BLACK-BOX STORAGE SYSTEMS'
[patent_app_type] => utility
[patent_app_number] => 14/135455
[patent_app_country] => US
[patent_app_date] => 2013-12-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 5435
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14135455
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/135455 | Dynamic feedback-based throughput control for black-box storage systems | Dec 18, 2013 | Issued |
Array
(
[id] => 9859769
[patent_doc_number] => 20150039785
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-02-05
[patent_title] => 'ELECTRONIC DEVICE AND METHOD FOR FABRICATING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 14/103490
[patent_app_country] => US
[patent_app_date] => 2013-12-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 11001
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14103490
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/103490 | Electronic device including a semiconductor memory that includes resistance variable layers disposed between an odd-numbered structure and an even-numbered structure, and method for fabricating the same | Dec 10, 2013 | Issued |
Array
(
[id] => 11095037
[patent_doc_number] => 20160292005
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-10-06
[patent_title] => 'METHOD AND APPARATUS FOR SCHEDULING PIPELINE OF MULTIPROCESSOR-BASED MOTION CONTROL SOFTWARE'
[patent_app_type] => utility
[patent_app_number] => 15/035433
[patent_app_country] => US
[patent_app_date] => 2013-11-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 4790
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15035433
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/035433 | Method and apparatus for scheduling pipeline of multiprocessor-based motion control software | Nov 28, 2013 | Issued |
Array
(
[id] => 12195371
[patent_doc_number] => 09899105
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-02-20
[patent_title] => 'Systems and methods for low voltage secure digital (SD) interfaces'
[patent_app_type] => utility
[patent_app_number] => 14/087047
[patent_app_country] => US
[patent_app_date] => 2013-11-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4759
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 64
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14087047
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/087047 | Systems and methods for low voltage secure digital (SD) interfaces | Nov 21, 2013 | Issued |
Array
(
[id] => 11102889
[patent_doc_number] => 20160299859
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-10-13
[patent_title] => 'APPARATUS AND METHOD FOR EXTERNAL ACCESS TO CORE RESOURCES OF A PROCESSOR, SEMICONDUCTOR SYSTEMS DEVELOPMENT TOOL COMPRISING THE APPARATUS, AND COMPUTER PROGRAM PRODUCT AND NON-TRANSITORY COMPUTER-READABLE STORAGE MEDIUM ASSOCIATED WITH THE METHOD'
[patent_app_type] => utility
[patent_app_number] => 15/036847
[patent_app_country] => US
[patent_app_date] => 2013-11-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4671
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15036847
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/036847 | APPARATUS AND METHOD FOR EXTERNAL ACCESS TO CORE RESOURCES OF A PROCESSOR, SEMICONDUCTOR SYSTEMS DEVELOPMENT TOOL COMPRISING THE APPARATUS, AND COMPUTER PROGRAM PRODUCT AND NON-TRANSITORY COMPUTER-READABLE STORAGE MEDIUM ASSOCIATED WITH THE METHOD | Nov 21, 2013 | Abandoned |
Array
(
[id] => 10258017
[patent_doc_number] => 20150143014
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-05-21
[patent_title] => 'SUPPORT FOR IOAPIC INTERRUPTS IN AMBA-BASED DEVICES'
[patent_app_type] => utility
[patent_app_number] => 14/086860
[patent_app_country] => US
[patent_app_date] => 2013-11-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 5179
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14086860
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/086860 | Support for IOAPIC interrupts in AMBA-based devices | Nov 20, 2013 | Issued |
Array
(
[id] => 9961154
[patent_doc_number] => 09009378
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-04-14
[patent_title] => 'Method and apparatus for enhancing universal serial bus applications'
[patent_app_type] => utility
[patent_app_number] => 14/049585
[patent_app_country] => US
[patent_app_date] => 2013-10-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 19
[patent_no_of_words] => 16648
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 185
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14049585
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/049585 | Method and apparatus for enhancing universal serial bus applications | Oct 8, 2013 | Issued |
Array
(
[id] => 10530143
[patent_doc_number] => 09256276
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-02-09
[patent_title] => 'Utilization of processor capacity at low operating frequencies'
[patent_app_type] => utility
[patent_app_number] => 14/039368
[patent_app_country] => US
[patent_app_date] => 2013-09-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 6660
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 64
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14039368
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/039368 | Utilization of processor capacity at low operating frequencies | Sep 26, 2013 | Issued |
Array
(
[id] => 10501473
[patent_doc_number] => 09229874
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-01-05
[patent_title] => 'Apparatus and method for compressing a memory address'
[patent_app_type] => utility
[patent_app_number] => 14/040364
[patent_app_country] => US
[patent_app_date] => 2013-09-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 13
[patent_no_of_words] => 6926
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 179
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14040364
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/040364 | Apparatus and method for compressing a memory address | Sep 26, 2013 | Issued |
Array
(
[id] => 9398398
[patent_doc_number] => 20140095803
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-04-03
[patent_title] => 'MEMORY SYSTEM CONFIGURED TO PERFORM SEGMENT CLEANING AND RELATED METHOD OF OPERATION'
[patent_app_type] => utility
[patent_app_number] => 14/038917
[patent_app_country] => US
[patent_app_date] => 2013-09-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 8237
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14038917
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/038917 | Memory system configured to perform segment cleaning and related method of operation | Sep 26, 2013 | Issued |