Eric T. Oberly

Array ( [id] => 19892041 [patent_doc_number] => 20250117353 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-10 [patent_title] => UTILIZING A SINGLE CHIP SELECT LINE TO SUPPORT MULTIPLE PERIPHERAL COMPONENTS IN A SYNCHRONOUS SERIAL COMMUNICATION SYSTEM [patent_app_type] => utility [patent_app_number] => 18/483286 [patent_app_country] => US [patent_app_date] => 2023-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7784 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18483286 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19617560 [patent_doc_number] => 20240403240 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-05 [patent_title] => SYSTEMS AND METHODS FOR SEMICONDUCTOR DEVICES WITH EXTENDED HIGH-BANDWIDTH MEMORY (HBM) OFFSETS [patent_app_type] => utility [patent_app_number] => 18/474384 [patent_app_country] => US [patent_app_date] => 2023-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7978 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18474384 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18973993 [patent_doc_number] => 20240054085 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-15 [patent_title] => METHOD FOR CONTROLLING A TARGET MEMORY BY PROGRAMMABLY SELECTING AN ACTION EXECUTION CIRCUIT MODULE CORRESPONDING TO A TRIGGERED PRESET STATE [patent_app_type] => utility [patent_app_number] => 18/373196 [patent_app_country] => US [patent_app_date] => 2023-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8223 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18373196 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20415784 [patent_doc_number] => 12499070 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-16 [patent_title] => Semiconductor device and electronic device capable of reducing internal line pattern complexity and area and communication method thereof [patent_app_type] => utility [patent_app_number] => 18/459650 [patent_app_country] => US [patent_app_date] => 2023-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 17 [patent_no_of_words] => 3402 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18459650 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19819202 [patent_doc_number] => 20250077409 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-06 [patent_title] => Low Latency Offloading of Collectives over a Switch [patent_app_type] => utility [patent_app_number] => 18/240640 [patent_app_country] => US [patent_app_date] => 2023-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6480 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18240640 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18819658 [patent_doc_number] => 20230393998 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-07 [patent_title] => LOCAL NON-VOLATILE MEMORY EXPRESS VIRTUALIZATION DEVICE [patent_app_type] => utility [patent_app_number] => 18/236240 [patent_app_country] => US [patent_app_date] => 2023-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16398 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18236240 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19695050 [patent_doc_number] => 20250013595 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-09 [patent_title] => DEVICE CONTROL METHOD, MEMORY STORAGE DEVICE AND MEMORY CONTROL CIRCUIT UNIT [patent_app_type] => utility [patent_app_number] => 18/450411 [patent_app_country] => US [patent_app_date] => 2023-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9559 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18450411 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19787399 [patent_doc_number] => 20250061078 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-20 [patent_title] => EFFICIENT CHIP-TO-CHIP COMMUNICATIONS [patent_app_type] => utility [patent_app_number] => 18/449979 [patent_app_country] => US [patent_app_date] => 2023-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12601 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18449979 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19686419 [patent_doc_number] => 20250004964 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-02 [patent_title] => METHODS, SYSTEMS, AND COMPUTER READABLE MEDIA FOR EXPOSING FEATURES OF AN INTERNET OF THINGS (IoT) DEVICE [patent_app_type] => utility [patent_app_number] => 18/233552 [patent_app_country] => US [patent_app_date] => 2023-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6343 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18233552 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19267721 [patent_doc_number] => 20240211424 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-27 [patent_title] => MEMORY EXPANDER AND COMPUTING SYSTEM INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/448701 [patent_app_country] => US [patent_app_date] => 2023-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13517 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18448701 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19036528 [patent_doc_number] => 20240086343 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-14 [patent_title] => METHOD FOR THE REPEATED TRANSMISSION OF DEFINED DATA [patent_app_type] => utility [patent_app_number] => 18/447532 [patent_app_country] => US [patent_app_date] => 2023-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3659 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 291 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18447532 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20145694 [patent_doc_number] => 12380037 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-05 [patent_title] => Information handling system with a switch circuit to perform as a dock [patent_app_type] => utility [patent_app_number] => 18/364501 [patent_app_country] => US [patent_app_date] => 2023-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 0 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18364501 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19756322 [patent_doc_number] => 20250044887 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-06 [patent_title] => SYSTEM AND METHOD FOR RECOVERY AND COMPENSATION FOR DROPPED OR MISSED DATA PACKETS FOR COMMUNICATION BETWEEN A WIRELESS MOUSE AND A WIRELESS COMMUNICATION DONGLE [patent_app_type] => utility [patent_app_number] => 18/229552 [patent_app_country] => US [patent_app_date] => 2023-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 26957 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 260 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18229552 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20537581 [patent_doc_number] => 12554658 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-17 [patent_title] => Multi-host bandwidth management considering external and internal traffic [patent_app_type] => utility [patent_app_number] => 18/363131 [patent_app_country] => US [patent_app_date] => 2023-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 0 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18363131 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18711370 [patent_doc_number] => 20230333999 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-19 [patent_title] => MAXIMIZING ON-CHIP DATA REUSE IN COMPUTE IN MEMORY AND COMPUTE NEAR MEMORY ARCHITECTURES [patent_app_type] => utility [patent_app_number] => 18/339762 [patent_app_country] => US [patent_app_date] => 2023-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8505 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18339762 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18846596 [patent_doc_number] => 20230409000 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => Programmable Logic Controller with Voice Control [patent_app_type] => utility [patent_app_number] => 18/335369 [patent_app_country] => US [patent_app_date] => 2023-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3134 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18335369 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18832457 [patent_doc_number] => 20230400984 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-14 [patent_title] => VARIABLE SIZE RECORD STORAGE [patent_app_type] => utility [patent_app_number] => 18/331508 [patent_app_country] => US [patent_app_date] => 2023-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7289 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18331508 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20374011 [patent_doc_number] => 12481445 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-25 [patent_title] => Processing system and processing method for neural network [patent_app_type] => utility [patent_app_number] => 18/326328 [patent_app_country] => US [patent_app_date] => 2023-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 11536 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18326328 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20188734 [patent_doc_number] => 12399848 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-26 [patent_title] => Distributing virtual channel requests with multiple memory modules [patent_app_type] => utility [patent_app_number] => 18/204317 [patent_app_country] => US [patent_app_date] => 2023-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4277 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18204317 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18630412 [patent_doc_number] => 20230289305 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-14 [patent_title] => DIRECT ACCESS TO A HARDWARE DEVICE FOR VIRTUAL MACHINES OF A VIRTUALIZED COMPUTER SYSTEM [patent_app_type] => utility [patent_app_number] => 18/318983 [patent_app_country] => US [patent_app_date] => 2023-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12441 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18318983 [rel_patent_id] =>[rel_patent_doc_number] =>)