Search

Eric T. Oberly

Examiner (ID: 5591, Phone: (571)272-6991 , Office: P/2184 )

Most Active Art Unit
2184
Art Unit(s)
2184
Total Applications
692
Issued Applications
505
Pending Applications
44
Abandoned Applications
152

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17581252 [patent_doc_number] => 20220138107 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-05 [patent_title] => CACHE FOR STORING REGIONS OF DATA [patent_app_type] => utility [patent_app_number] => 17/575991 [patent_app_country] => US [patent_app_date] => 2022-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9817 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17575991 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/575991
CACHE FOR STORING REGIONS OF DATA Jan 13, 2022 Pending
Array ( [id] => 17722269 [patent_doc_number] => 20220214991 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-07 [patent_title] => CHIPS INCLUDING CLASSICAL AND QUANTUM COMPUTING PROCESSORS [patent_app_type] => utility [patent_app_number] => 17/575552 [patent_app_country] => US [patent_app_date] => 2022-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7822 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17575552 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/575552
Chips including classical and quantum computing processors Jan 12, 2022 Issued
Array ( [id] => 17550265 [patent_doc_number] => 20220121607 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-21 [patent_title] => IO PROCESSING METHOD AND APPARATUS [patent_app_type] => utility [patent_app_number] => 17/564064 [patent_app_country] => US [patent_app_date] => 2021-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15398 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17564064 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/564064
IO processing method and apparatus Dec 27, 2021 Issued
Array ( [id] => 18454388 [patent_doc_number] => 20230195668 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-22 [patent_title] => LARGE TOUCH DISPLAY INTEGRATED CIRCUIT AND OPERATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/558600 [patent_app_country] => US [patent_app_date] => 2021-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4684 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17558600 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/558600
Large touch display integrated circuit and operation method thereof Dec 21, 2021 Issued
Array ( [id] => 19197786 [patent_doc_number] => 11995024 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-28 [patent_title] => State sharing between smart NICs [patent_app_type] => utility [patent_app_number] => 17/560148 [patent_app_country] => US [patent_app_date] => 2021-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 13965 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 288 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17560148 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/560148
State sharing between smart NICs Dec 21, 2021 Issued
Array ( [id] => 18422280 [patent_doc_number] => 20230176744 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-08 [patent_title] => Enterprise Host Memory Buffer [patent_app_type] => utility [patent_app_number] => 17/543473 [patent_app_country] => US [patent_app_date] => 2021-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5242 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17543473 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/543473
Enterprise host memory buffer Dec 5, 2021 Issued
Array ( [id] => 19122601 [patent_doc_number] => 11966587 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-23 [patent_title] => Method for optimizing polar-RNNA quantizer of MLC-type NAND flash memory on basis of deep learning [patent_app_type] => utility [patent_app_number] => 17/905351 [patent_app_country] => US [patent_app_date] => 2021-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3141 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 431 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17905351 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/905351
Method for optimizing polar-RNNA quantizer of MLC-type NAND flash memory on basis of deep learning Nov 7, 2021 Issued
Array ( [id] => 17915770 [patent_doc_number] => 20220318166 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-06 [patent_title] => SERIAL COMMUNICATION METHOD AND SYSTEM FOR MEMORY ACCESS [patent_app_type] => utility [patent_app_number] => 17/518823 [patent_app_country] => US [patent_app_date] => 2021-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7958 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17518823 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/518823
Serial communication method and system for memory access Nov 3, 2021 Issued
Array ( [id] => 19212276 [patent_doc_number] => 12001338 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-04 [patent_title] => Method and system for implementing metadata compression in a virtualization environment [patent_app_type] => utility [patent_app_number] => 17/452834 [patent_app_country] => US [patent_app_date] => 2021-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10537 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17452834 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/452834
Method and system for implementing metadata compression in a virtualization environment Oct 28, 2021 Issued
Array ( [id] => 17581281 [patent_doc_number] => 20220138136 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-05 [patent_title] => DIE TO DIE PHYSICAL LAYER TRANSLATION SWITCH [patent_app_type] => utility [patent_app_number] => 17/512108 [patent_app_country] => US [patent_app_date] => 2021-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2694 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17512108 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/512108
DIE TO DIE PHYSICAL LAYER TRANSLATION SWITCH Oct 26, 2021 Abandoned
Array ( [id] => 17387584 [patent_doc_number] => 20220035436 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-03 [patent_title] => USB INTERFACE CIRCUIT AND METHOD FOR LOW POWER OPERATION [patent_app_type] => utility [patent_app_number] => 17/505522 [patent_app_country] => US [patent_app_date] => 2021-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5755 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17505522 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/505522
USB interface circuit and method for low power operation Oct 18, 2021 Issued
Array ( [id] => 19197781 [patent_doc_number] => 11995019 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-28 [patent_title] => PCIe device with changeable function types and operating method thereof [patent_app_type] => utility [patent_app_number] => 17/504351 [patent_app_country] => US [patent_app_date] => 2021-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 20 [patent_no_of_words] => 19235 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17504351 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/504351
PCIe device with changeable function types and operating method thereof Oct 17, 2021 Issued
Array ( [id] => 18241617 [patent_doc_number] => 20230073928 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-09 [patent_title] => MEMORY SUB-SYSTEM QOS POOL MANAGEMENT [patent_app_type] => utility [patent_app_number] => 17/467101 [patent_app_country] => US [patent_app_date] => 2021-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8769 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17467101 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/467101
Memory sub-system QOS pool management Sep 2, 2021 Issued
Array ( [id] => 18750052 [patent_doc_number] => 11809363 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-11-07 [patent_title] => Debug methodology for a USB sub-system using unique identifier (UID) approach [patent_app_type] => utility [patent_app_number] => 17/462753 [patent_app_country] => US [patent_app_date] => 2021-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 8171 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17462753 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/462753
Debug methodology for a USB sub-system using unique identifier (UID) approach Aug 30, 2021 Issued
Array ( [id] => 18431426 [patent_doc_number] => 11676653 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-13 [patent_title] => Read/write control method and device for DDR dynamic random access memory, and system [patent_app_type] => utility [patent_app_number] => 17/407092 [patent_app_country] => US [patent_app_date] => 2021-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 4174 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 324 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17407092 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/407092
Read/write control method and device for DDR dynamic random access memory, and system Aug 18, 2021 Issued
Array ( [id] => 18622469 [patent_doc_number] => 11755512 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-12 [patent_title] => Managing inter-processor interrupts in virtualized computer systems [patent_app_type] => utility [patent_app_number] => 17/404947 [patent_app_country] => US [patent_app_date] => 2021-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6731 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17404947 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/404947
Managing inter-processor interrupts in virtualized computer systems Aug 16, 2021 Issued
Array ( [id] => 18933936 [patent_doc_number] => 11886364 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-30 [patent_title] => Adaptive hybrid polling based on outstanding input/output (I/O) determination [patent_app_type] => utility [patent_app_number] => 17/402652 [patent_app_country] => US [patent_app_date] => 2021-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6381 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17402652 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/402652
Adaptive hybrid polling based on outstanding input/output (I/O) determination Aug 15, 2021 Issued
Array ( [id] => 18506441 [patent_doc_number] => 11704258 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-18 [patent_title] => Latency reduction in SPI flash memory devices [patent_app_type] => utility [patent_app_number] => 17/399263 [patent_app_country] => US [patent_app_date] => 2021-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 5951 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17399263 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/399263
Latency reduction in SPI flash memory devices Aug 10, 2021 Issued
Array ( [id] => 18006920 [patent_doc_number] => 20220365686 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-17 [patent_title] => EVALUATION SYSTEM FOR EVALUATING RESOURCE OPERATION OF INFORMATION SYSTEM BY USER [patent_app_type] => utility [patent_app_number] => 17/388955 [patent_app_country] => US [patent_app_date] => 2021-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8972 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17388955 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/388955
Evaluation system for evaluating resource operation of information system by user Jul 28, 2021 Issued
Array ( [id] => 17856896 [patent_doc_number] => 20220286939 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-08 [patent_title] => SDL CACHE FOR O-RAN [patent_app_type] => utility [patent_app_number] => 17/376835 [patent_app_country] => US [patent_app_date] => 2021-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7844 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17376835 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/376835
SDL cache for O-RAN Jul 14, 2021 Issued
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