Search

Eric W. Jones

Examiner (ID: 4095, Phone: (571)270-3416 , Office: P/2892 )

Most Active Art Unit
2892
Art Unit(s)
4176, 2892, 2809
Total Applications
784
Issued Applications
462
Pending Applications
73
Abandoned Applications
276

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10455480 [patent_doc_number] => 20150340495 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-26 [patent_title] => 'VERTICAL COMPOUND SEMICONDUCTOR FIELD EFFECT TRANSISTOR ON A GROUP IV SEMICONDUCTOR SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 14/283450 [patent_app_country] => US [patent_app_date] => 2014-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7056 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14283450 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/283450
Vertical compound semiconductor field effect transistor on a group IV semiconductor substrate May 20, 2014 Issued
Array ( [id] => 10455279 [patent_doc_number] => 20150340294 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-26 [patent_title] => 'STRUCTURE AND METHOD FOR EFFECTIVE DEVICE WIDTH ADJUSTMENT IN FINFET DEVICES USING GATE WORKFUNCTION SHIFT' [patent_app_type] => utility [patent_app_number] => 14/283633 [patent_app_country] => US [patent_app_date] => 2014-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3220 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14283633 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/283633
Structure and method for effective device width adjustment in finFET devices using gate workfunction shift May 20, 2014 Issued
Array ( [id] => 12457140 [patent_doc_number] => 09984917 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-05-29 [patent_title] => Semiconductor device with an interconnect and a method for manufacturing thereof [patent_app_type] => utility [patent_app_number] => 14/283242 [patent_app_country] => US [patent_app_date] => 2014-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 8805 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14283242 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/283242
Semiconductor device with an interconnect and a method for manufacturing thereof May 20, 2014 Issued
Array ( [id] => 11250199 [patent_doc_number] => 09475690 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-10-25 [patent_title] => 'Low-stress doped ultrananocrystalline diamond' [patent_app_type] => utility [patent_app_number] => 14/283098 [patent_app_country] => US [patent_app_date] => 2014-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 42 [patent_no_of_words] => 6136 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14283098 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/283098
Low-stress doped ultrananocrystalline diamond May 19, 2014 Issued
Array ( [id] => 10455311 [patent_doc_number] => 20150340326 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-26 [patent_title] => 'SHUNT OF P GATE TO N GATE BOUNDARY RESISTANCE FOR METAL GATE TECHNOLOGIES' [patent_app_type] => utility [patent_app_number] => 14/282538 [patent_app_country] => US [patent_app_date] => 2014-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 8575 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14282538 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/282538
SHUNT OF P GATE TO N GATE BOUNDARY RESISTANCE FOR METAL GATE TECHNOLOGIES May 19, 2014 Abandoned
Array ( [id] => 10718549 [patent_doc_number] => 20160064695 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-03 [patent_title] => 'ORGANIC ELECTROLUMINESCENCE ELEMENT AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/786310 [patent_app_country] => US [patent_app_date] => 2014-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 15983 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14786310 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/786310
ORGANIC ELECTROLUMINESCENCE ELEMENT AND METHOD OF MANUFACTURING THE SAME Apr 22, 2014 Abandoned
Array ( [id] => 13667157 [patent_doc_number] => 10163756 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-25 [patent_title] => Isolation structure for stacked dies [patent_app_type] => utility [patent_app_number] => 14/254597 [patent_app_country] => US [patent_app_date] => 2014-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 4880 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 14 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14254597 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/254597
Isolation structure for stacked dies Apr 15, 2014 Issued
Array ( [id] => 14604087 [patent_doc_number] => 10355242 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-16 [patent_title] => Electroluminescent device including a plurality of sealing films [patent_app_type] => utility [patent_app_number] => 14/786689 [patent_app_country] => US [patent_app_date] => 2014-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 8187 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14786689 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/786689
Electroluminescent device including a plurality of sealing films Feb 26, 2014 Issued
Array ( [id] => 10336759 [patent_doc_number] => 20150221764 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-06 [patent_title] => 'WAFER BASED BEOL PROCESS FOR CHIP EMBEDDING' [patent_app_type] => utility [patent_app_number] => 14/171839 [patent_app_country] => US [patent_app_date] => 2014-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8122 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14171839 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/171839
WAFER BASED BEOL PROCESS FOR CHIP EMBEDDING Feb 3, 2014 Abandoned
Array ( [id] => 10336691 [patent_doc_number] => 20150221696 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-06 [patent_title] => 'Pixel With Transistor Gate Covering Photodiode' [patent_app_type] => utility [patent_app_number] => 14/170926 [patent_app_country] => US [patent_app_date] => 2014-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5347 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14170926 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/170926
Pixel with transistor gate covering photodiode Feb 2, 2014 Issued
Array ( [id] => 11898206 [patent_doc_number] => 09768147 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-09-19 [patent_title] => 'Thermal pads between stacked semiconductor dies and associated systems and methods' [patent_app_type] => utility [patent_app_number] => 14/171169 [patent_app_country] => US [patent_app_date] => 2014-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 25 [patent_no_of_words] => 3860 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 307 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14171169 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/171169
Thermal pads between stacked semiconductor dies and associated systems and methods Feb 2, 2014 Issued
Array ( [id] => 10336728 [patent_doc_number] => 20150221733 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-06 [patent_title] => 'TRENCH MOSFET WITH SELF-ALIGNED SOURCE AND CONTACT REGIONS USING THREE MASKS PROCESS' [patent_app_type] => utility [patent_app_number] => 14/170784 [patent_app_country] => US [patent_app_date] => 2014-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 2768 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14170784 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/170784
TRENCH MOSFET WITH SELF-ALIGNED SOURCE AND CONTACT REGIONS USING THREE MASKS PROCESS Feb 2, 2014 Abandoned
Array ( [id] => 11876507 [patent_doc_number] => 09748290 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-08-29 [patent_title] => 'Mechanisms for forming image sensor with lateral doping gradient' [patent_app_type] => utility [patent_app_number] => 14/170968 [patent_app_country] => US [patent_app_date] => 2014-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 4873 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14170968 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/170968
Mechanisms for forming image sensor with lateral doping gradient Feb 2, 2014 Issued
Array ( [id] => 9600732 [patent_doc_number] => 20140197414 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-17 [patent_title] => 'ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 14/104051 [patent_app_country] => US [patent_app_date] => 2013-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4128 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14104051 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/104051
Array substrate and manufacturing method thereof Dec 11, 2013 Issued
Array ( [id] => 9542450 [patent_doc_number] => 20140167097 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-19 [patent_title] => 'OPTOELECTRONIC DEVICE AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/104017 [patent_app_country] => US [patent_app_date] => 2013-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5940 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14104017 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/104017
OPTOELECTRONIC DEVICE AND METHOD FOR MANUFACTURING THE SAME Dec 11, 2013 Abandoned
Array ( [id] => 13122001 [patent_doc_number] => 10079358 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-09-18 [patent_title] => Array substrate, method for manufacturing the same, and display device [patent_app_type] => utility [patent_app_number] => 14/103222 [patent_app_country] => US [patent_app_date] => 2013-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 5258 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 285 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14103222 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/103222
Array substrate, method for manufacturing the same, and display device Dec 10, 2013 Issued
Array ( [id] => 9534374 [patent_doc_number] => 20140159020 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-12 [patent_title] => 'ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 14/103617 [patent_app_country] => US [patent_app_date] => 2013-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4068 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14103617 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/103617
Array substrate and manufacturing method thereof Dec 10, 2013 Issued
Array ( [id] => 14064053 [patent_doc_number] => 10236332 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-03-19 [patent_title] => Organic light emitting diode display having high luminescence [patent_app_type] => utility [patent_app_number] => 14/103232 [patent_app_country] => US [patent_app_date] => 2013-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 6937 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14103232 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/103232
Organic light emitting diode display having high luminescence Dec 10, 2013 Issued
Array ( [id] => 9534365 [patent_doc_number] => 20140159012 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-12 [patent_title] => 'ARRAY SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME, DISPLAY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/101735 [patent_app_country] => US [patent_app_date] => 2013-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4596 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14101735 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/101735
Array substrate and method for manufacturing the same, display device Dec 9, 2013 Issued
Array ( [id] => 9631827 [patent_doc_number] => 20140209935 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-31 [patent_title] => 'ARRAY SUBSTRATE AND DISPLAY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/101881 [patent_app_country] => US [patent_app_date] => 2013-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2289 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14101881 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/101881
Arrangement of passivation layers in a pixel unit of an array substrate and display device Dec 9, 2013 Issued
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