
Eric W. Jones
Examiner (ID: 2375, Phone: (571)270-3416 , Office: P/2892 )
| Most Active Art Unit | 2892 |
| Art Unit(s) | 2892, 4176, 2809 |
| Total Applications | 808 |
| Issued Applications | 469 |
| Pending Applications | 87 |
| Abandoned Applications | 277 |
Applications
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|---|---|---|---|
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