
Erica E. Cadugan
Examiner (ID: 10388, Phone: (571)272-4474 , Office: P/3722 )
| Most Active Art Unit | 3722 |
| Art Unit(s) | 3726, 3722 |
| Total Applications | 1811 |
| Issued Applications | 1337 |
| Pending Applications | 125 |
| Abandoned Applications | 364 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 8991915
[patent_doc_number] => 20130219196
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-08-22
[patent_title] => 'POWER MANAGEMENT FOR MULTIPLE PROCESSOR CORES'
[patent_app_type] => utility
[patent_app_number] => 13/847392
[patent_app_country] => US
[patent_app_date] => 2013-03-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 5806
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13847392
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/847392 | POWER MANAGEMENT FOR MULTIPLE PROCESSOR CORES | Mar 18, 2013 | Abandoned |
Array
(
[id] => 9752200
[patent_doc_number] => 08843689
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-09-23
[patent_title] => 'Concurrent repair of the PCIe switch units in a tightly-coupled, multi-switch, multi-adapter, multi-host distributed system'
[patent_app_type] => utility
[patent_app_number] => 13/792957
[patent_app_country] => US
[patent_app_date] => 2013-03-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 7448
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 202
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13792957
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/792957 | Concurrent repair of the PCIe switch units in a tightly-coupled, multi-switch, multi-adapter, multi-host distributed system | Mar 10, 2013 | Issued |
Array
(
[id] => 9688110
[patent_doc_number] => 20140244875
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-08-28
[patent_title] => 'Priority Based Connection Arbitration in a SAS Topology to Facilitate Quality of Service (QoS) in SAS Transport'
[patent_app_type] => utility
[patent_app_number] => 13/776160
[patent_app_country] => US
[patent_app_date] => 2013-02-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 2820
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13776160
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/776160 | Priority based connection arbitration in a SAS topology to facilitate quality of service (QoS) in SAS transport | Feb 24, 2013 | Issued |
Array
(
[id] => 9688112
[patent_doc_number] => 20140244877
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-08-28
[patent_title] => 'Emulating Level Triggered Interrupts of Physical Devices Assigned to a Virtual Machine'
[patent_app_type] => utility
[patent_app_number] => 13/776288
[patent_app_country] => US
[patent_app_date] => 2013-02-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6890
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13776288
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/776288 | Emulating level triggered interrupts of physical devices assigned to virtual machine | Feb 24, 2013 | Issued |
Array
(
[id] => 10100680
[patent_doc_number] => 09137005
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-09-15
[patent_title] => 'Managing arbitration in mixed link rate wide ports'
[patent_app_type] => utility
[patent_app_number] => 13/763152
[patent_app_country] => US
[patent_app_date] => 2013-02-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 10
[patent_no_of_words] => 4440
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 136
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13763152
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/763152 | Managing arbitration in mixed link rate wide ports | Feb 7, 2013 | Issued |
Array
(
[id] => 9006067
[patent_doc_number] => 20130227192
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-08-29
[patent_title] => 'STORAGE MEDIUM STORING INPUT/OUTPUT SETTING PROGRAM, STORAGE MEDIUM STORING OUTPUT SETTING PROGRAM, AND DATA PROCESSING APPARATUS'
[patent_app_type] => utility
[patent_app_number] => 13/761731
[patent_app_country] => US
[patent_app_date] => 2013-02-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 8838
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13761731
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/761731 | Storage medium storing input/output setting program, storage medium storing output setting program, and data processing apparatus | Feb 6, 2013 | Issued |
Array
(
[id] => 9365196
[patent_doc_number] => 20140075070
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-03-13
[patent_title] => 'SIGNAL TRANSMISSION METHOD FOR USB INTERFACE AND APPARATUS THEREOF'
[patent_app_type] => utility
[patent_app_number] => 13/761323
[patent_app_country] => US
[patent_app_date] => 2013-02-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 8773
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13761323
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/761323 | Signal transmission method for USB interface and apparatus thereof | Feb 6, 2013 | Issued |
Array
(
[id] => 8823724
[patent_doc_number] => 20130124769
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-05-16
[patent_title] => 'EMULATION OF AN INPUT/OUTPUT ADVANCED PROGRAMMABLE INTERRUPT CONTROLLER'
[patent_app_type] => utility
[patent_app_number] => 13/738483
[patent_app_country] => US
[patent_app_date] => 2013-01-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 5146
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13738483
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/738483 | Emulation of an input/output advanced programmable interrupt controller | Jan 9, 2013 | Issued |
Array
(
[id] => 10093985
[patent_doc_number] => 09130824
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-09-08
[patent_title] => 'Chassis management implementation by management instance on baseboard management controller managing multiple computer nodes'
[patent_app_type] => utility
[patent_app_number] => 13/736233
[patent_app_country] => US
[patent_app_date] => 2013-01-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 10081
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 164
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13736233
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/736233 | Chassis management implementation by management instance on baseboard management controller managing multiple computer nodes | Jan 7, 2013 | Issued |
Array
(
[id] => 8885545
[patent_doc_number] => 20130158729
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-06-20
[patent_title] => 'SYSTEM AND METHOD FOR QUERYING FOR ENERGY DATA IN A NETWORK ENVIRONMENT'
[patent_app_type] => utility
[patent_app_number] => 13/736035
[patent_app_country] => US
[patent_app_date] => 2013-01-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 10708
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13736035
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/736035 | System and method for querying for energy data in a network environment | Jan 6, 2013 | Issued |
Array
(
[id] => 9599030
[patent_doc_number] => 20140195711
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-07-10
[patent_title] => 'PCI EXPRESS CHANNEL IMPLEMENTATION IN INTELLIGENT PLATFORM MANAGEMENT INTERFACE STACK'
[patent_app_type] => utility
[patent_app_number] => 13/734549
[patent_app_country] => US
[patent_app_date] => 2013-01-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 8612
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13734549
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/734549 | PCI express channel implementation in intelligent platform management interface stack | Jan 3, 2013 | Issued |
Array
(
[id] => 9548510
[patent_doc_number] => 20140173158
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-06-19
[patent_title] => 'Rate of Transfer of Data Within A Plasma System'
[patent_app_type] => utility
[patent_app_number] => 13/715942
[patent_app_country] => US
[patent_app_date] => 2012-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 13197
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13715942
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/715942 | Optimizing a rate of transfer of data between an RF generator and a host system within a plasma tool | Dec 13, 2012 | Issued |
Array
(
[id] => 10079185
[patent_doc_number] => 09117033
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-08-25
[patent_title] => 'Method, device, and system for packet transmission on PCIE bus'
[patent_app_type] => utility
[patent_app_number] => 13/715402
[patent_app_country] => US
[patent_app_date] => 2012-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 3
[patent_no_of_words] => 6002
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 158
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13715402
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/715402 | Method, device, and system for packet transmission on PCIE bus | Dec 13, 2012 | Issued |
Array
(
[id] => 10079033
[patent_doc_number] => 09116881
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-08-25
[patent_title] => 'Routing switch apparatus, network switch system, and routing switching method'
[patent_app_type] => utility
[patent_app_number] => 13/715646
[patent_app_country] => US
[patent_app_date] => 2012-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 5522
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 232
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13715646
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/715646 | Routing switch apparatus, network switch system, and routing switching method | Dec 13, 2012 | Issued |
Array
(
[id] => 8781900
[patent_doc_number] => 20130103875
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-04-25
[patent_title] => 'CPU INTERCONNECT DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/707209
[patent_app_country] => US
[patent_app_date] => 2012-12-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 7738
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13707209
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/707209 | CPU interconnect device | Dec 5, 2012 | Issued |
Array
(
[id] => 9630002
[patent_doc_number] => 08799696
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-08-05
[patent_title] => 'Adaptive recovery for parallel reactive power throttling'
[patent_app_type] => utility
[patent_app_number] => 13/706882
[patent_app_country] => US
[patent_app_date] => 2012-12-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 10
[patent_no_of_words] => 7797
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 232
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13706882
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/706882 | Adaptive recovery for parallel reactive power throttling | Dec 5, 2012 | Issued |
Array
(
[id] => 10041204
[patent_doc_number] => 09081912
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-07-14
[patent_title] => 'Method and apparatus for node hot-swapping'
[patent_app_type] => utility
[patent_app_number] => 13/683861
[patent_app_country] => US
[patent_app_date] => 2012-11-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 3280
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 77
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13683861
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/683861 | Method and apparatus for node hot-swapping | Nov 20, 2012 | Issued |
Array
(
[id] => 8735102
[patent_doc_number] => 20130080671
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-03-28
[patent_title] => 'BUS CONTROLLER AND CONTROL UNIT THAT OUTPUTS INSTRUCTION TO THE BUS CONTROLLER'
[patent_app_type] => utility
[patent_app_number] => 13/680268
[patent_app_country] => US
[patent_app_date] => 2012-11-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 7646
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13680268
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/680268 | Bus controller and control unit that outputs instruction to the bus controller | Nov 18, 2012 | Issued |
Array
(
[id] => 9847541
[patent_doc_number] => 08949474
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2015-02-03
[patent_title] => 'Method for inter-chip and intra-chip addressing using port identifiers and address mapping'
[patent_app_type] => utility
[patent_app_number] => 13/678952
[patent_app_country] => US
[patent_app_date] => 2012-11-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 4227
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13678952
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/678952 | Method for inter-chip and intra-chip addressing using port identifiers and address mapping | Nov 15, 2012 | Issued |
Array
(
[id] => 8831581
[patent_doc_number] => 20130132626
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-05-23
[patent_title] => 'PIN SELECTABLE I2C SLAVE ADDRESSES'
[patent_app_type] => utility
[patent_app_number] => 13/679465
[patent_app_country] => US
[patent_app_date] => 2012-11-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 4340
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13679465
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/679465 | Pin selectable I2C slave addresses | Nov 15, 2012 | Issued |