
Erica E. Cadugan
Examiner (ID: 10388, Phone: (571)272-4474 , Office: P/3722 )
| Most Active Art Unit | 3722 |
| Art Unit(s) | 3726, 3722 |
| Total Applications | 1811 |
| Issued Applications | 1337 |
| Pending Applications | 125 |
| Abandoned Applications | 364 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 9348023
[patent_doc_number] => 08667185
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-03-04
[patent_title] => 'Method and device for communication between a master and a number of slaves according to a serial communication protocol, in particular of the open drain type'
[patent_app_type] => utility
[patent_app_number] => 13/326922
[patent_app_country] => US
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[patent_effective_date] => 0000-00-00
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Array
(
[id] => 9630000
[patent_doc_number] => 08799694
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[patent_kind] => B2
[patent_issue_date] => 2014-08-05
[patent_title] => 'Adaptive recovery for parallel reactive power throttling'
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[patent_app_country] => US
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Array
(
[id] => 8314869
[patent_doc_number] => 20120191891
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-07-26
[patent_title] => 'MULTI-MASTER BUS ARBITRATION AND RESOURCE CONTROL'
[patent_app_type] => utility
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Array
(
[id] => 8886398
[patent_doc_number] => 20130159582
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-06-20
[patent_title] => 'Resource Reservation for an External Device that is Not Available at Startup of a Host Computer'
[patent_app_type] => utility
[patent_app_number] => 13/325288
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/325288 | Resource reservation for an external device that is not available at startup of a host computer | Dec 13, 2011 | Issued |
Array
(
[id] => 8886407
[patent_doc_number] => 20130159591
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[patent_kind] => A1
[patent_issue_date] => 2013-06-20
[patent_title] => 'VERIFYING DATA RECEIVED OUT-OF-ORDER FROM A BUS'
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/325701 | VERIFYING DATA RECEIVED OUT-OF-ORDER FROM A BUS | Dec 13, 2011 | Abandoned |
Array
(
[id] => 8546397
[patent_doc_number] => 08321700
[patent_country] => US
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[patent_issue_date] => 2012-11-27
[patent_title] => 'Using a single terminal for a power enable output signal and detecting an over-current condition'
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Array
(
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[patent_doc_number] => 08732377
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[patent_issue_date] => 2014-05-20
[patent_title] => 'Interconnection apparatus and controlling method therefor'
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Array
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[id] => 10879411
[patent_doc_number] => 08904209
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[patent_kind] => B2
[patent_issue_date] => 2014-12-02
[patent_title] => 'Estimating and managing power consumption of computing devices using power models'
[patent_app_type] => utility
[patent_app_number] => 13/295112
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[patent_app_date] => 2011-11-14
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Array
(
[id] => 8823722
[patent_doc_number] => 20130124767
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[patent_kind] => A1
[patent_issue_date] => 2013-05-16
[patent_title] => 'INTEGRATED CIRCUIT HAVING A BUS NETWORK, AND METHOD FOR THE INTEGRATED CIRCUIT'
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/295461 | Integrated circuit having a bus network, and method for the integrated circuit | Nov 13, 2011 | Issued |
Array
(
[id] => 8222830
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[patent_kind] => A1
[patent_issue_date] => 2012-05-31
[patent_title] => 'COMPUTING DEVICE AND SERIAL COMMUNICATION METHOD OF THE COMPUTING DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/294196
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/294196 | Computing device and serial communication method of the computing device | Nov 10, 2011 | Issued |
Array
(
[id] => 8823725
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[patent_issue_date] => 2013-05-16
[patent_title] => 'Configuring Expansion Component Interconnect (\'ECI\') Physical Functions On An ECI Device In A Computing System'
[patent_app_type] => utility
[patent_app_number] => 13/293806
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/293806 | Configuring expansion component interconnect (‘ECI’) physical functions on an ECI device in a computing system | Nov 9, 2011 | Issued |
Array
(
[id] => 8291525
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Array
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Array
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[patent_title] => 'Semiconductor device having DLL circuit'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/291733 | Semiconductor device having DLL circuit | Nov 7, 2011 | Issued |
Array
(
[id] => 9680543
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Array
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[patent_title] => 'CONTROLLING CIRCUIT WITH POWER SAVING MECHANISM AND ERRONEOUS WAKE-UP PREVENTING MECHANISM AND METHOD THEREOF'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/290134 | Controlling circuit with power saving mechanism and method thereof | Nov 6, 2011 | Issued |
Array
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[patent_issue_date] => 2013-11-26
[patent_title] => 'On-chip thermal management techniques using inter-processor time dependent power density data for indentification of thermal aggressors'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/290456 | On-chip thermal management techniques using inter-processor time dependent power density data for indentification of thermal aggressors | Nov 6, 2011 | Issued |
Array
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/317600 | Power Signature Obfuscation | Oct 23, 2011 | Abandoned |