Search

Erica E. Cadugan

Examiner (ID: 10388, Phone: (571)272-4474 , Office: P/3722 )

Most Active Art Unit
3722
Art Unit(s)
3726, 3722
Total Applications
1811
Issued Applications
1337
Pending Applications
125
Abandoned Applications
364

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9348023 [patent_doc_number] => 08667185 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-03-04 [patent_title] => 'Method and device for communication between a master and a number of slaves according to a serial communication protocol, in particular of the open drain type' [patent_app_type] => utility [patent_app_number] => 13/326922 [patent_app_country] => US [patent_app_date] => 2011-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 28 [patent_no_of_words] => 7687 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13326922 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/326922
Method and device for communication between a master and a number of slaves according to a serial communication protocol, in particular of the open drain type Dec 14, 2011 Issued
Array ( [id] => 9630000 [patent_doc_number] => 08799694 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-05 [patent_title] => 'Adaptive recovery for parallel reactive power throttling' [patent_app_type] => utility [patent_app_number] => 13/327100 [patent_app_country] => US [patent_app_date] => 2011-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 7758 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 240 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13327100 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/327100
Adaptive recovery for parallel reactive power throttling Dec 14, 2011 Issued
Array ( [id] => 8314869 [patent_doc_number] => 20120191891 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-26 [patent_title] => 'MULTI-MASTER BUS ARBITRATION AND RESOURCE CONTROL' [patent_app_type] => utility [patent_app_number] => 13/327058 [patent_app_country] => US [patent_app_date] => 2011-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3816 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13327058 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/327058
Multi-master bus arbitration and resource control Dec 14, 2011 Issued
Array ( [id] => 8886398 [patent_doc_number] => 20130159582 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-20 [patent_title] => 'Resource Reservation for an External Device that is Not Available at Startup of a Host Computer' [patent_app_type] => utility [patent_app_number] => 13/325288 [patent_app_country] => US [patent_app_date] => 2011-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7742 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13325288 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/325288
Resource reservation for an external device that is not available at startup of a host computer Dec 13, 2011 Issued
Array ( [id] => 8886407 [patent_doc_number] => 20130159591 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-20 [patent_title] => 'VERIFYING DATA RECEIVED OUT-OF-ORDER FROM A BUS' [patent_app_type] => utility [patent_app_number] => 13/325701 [patent_app_country] => US [patent_app_date] => 2011-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9680 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13325701 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/325701
VERIFYING DATA RECEIVED OUT-OF-ORDER FROM A BUS Dec 13, 2011 Abandoned
Array ( [id] => 8546397 [patent_doc_number] => 08321700 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-11-27 [patent_title] => 'Using a single terminal for a power enable output signal and detecting an over-current condition' [patent_app_type] => utility [patent_app_number] => 13/315868 [patent_app_country] => US [patent_app_date] => 2011-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3698 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13315868 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/315868
Using a single terminal for a power enable output signal and detecting an over-current condition Dec 8, 2011 Issued
Array ( [id] => 9486415 [patent_doc_number] => 08732377 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-20 [patent_title] => 'Interconnection apparatus and controlling method therefor' [patent_app_type] => utility [patent_app_number] => 13/296846 [patent_app_country] => US [patent_app_date] => 2011-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 42 [patent_figures_cnt] => 47 [patent_no_of_words] => 21241 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13296846 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/296846
Interconnection apparatus and controlling method therefor Nov 14, 2011 Issued
Array ( [id] => 10879411 [patent_doc_number] => 08904209 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-02 [patent_title] => 'Estimating and managing power consumption of computing devices using power models' [patent_app_type] => utility [patent_app_number] => 13/295112 [patent_app_country] => US [patent_app_date] => 2011-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8335 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13295112 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/295112
Estimating and managing power consumption of computing devices using power models Nov 13, 2011 Issued
Array ( [id] => 8823722 [patent_doc_number] => 20130124767 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-16 [patent_title] => 'INTEGRATED CIRCUIT HAVING A BUS NETWORK, AND METHOD FOR THE INTEGRATED CIRCUIT' [patent_app_type] => utility [patent_app_number] => 13/295461 [patent_app_country] => US [patent_app_date] => 2011-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7594 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13295461 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/295461
Integrated circuit having a bus network, and method for the integrated circuit Nov 13, 2011 Issued
Array ( [id] => 8222830 [patent_doc_number] => 20120137035 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-31 [patent_title] => 'COMPUTING DEVICE AND SERIAL COMMUNICATION METHOD OF THE COMPUTING DEVICE' [patent_app_type] => utility [patent_app_number] => 13/294196 [patent_app_country] => US [patent_app_date] => 2011-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1473 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13294196 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/294196
Computing device and serial communication method of the computing device Nov 10, 2011 Issued
Array ( [id] => 8823725 [patent_doc_number] => 20130124770 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-16 [patent_title] => 'Configuring Expansion Component Interconnect (\'ECI\') Physical Functions On An ECI Device In A Computing System' [patent_app_type] => utility [patent_app_number] => 13/293806 [patent_app_country] => US [patent_app_date] => 2011-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5158 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13293806 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/293806
Configuring expansion component interconnect (‘ECI’) physical functions on an ECI device in a computing system Nov 9, 2011 Issued
Array ( [id] => 8291525 [patent_doc_number] => 20120179851 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-12 [patent_title] => 'Computer System Interrupt Handling' [patent_app_type] => utility [patent_app_number] => 13/292721 [patent_app_country] => US [patent_app_date] => 2011-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6979 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13292721 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/292721
Computer system interrupt handling Nov 8, 2011 Issued
Array ( [id] => 9592892 [patent_doc_number] => 08782457 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-15 [patent_title] => 'Information processing apparatus and control method thereof' [patent_app_type] => utility [patent_app_number] => 13/291610 [patent_app_country] => US [patent_app_date] => 2011-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3678 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13291610 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/291610
Information processing apparatus and control method thereof Nov 7, 2011 Issued
Array ( [id] => 9486550 [patent_doc_number] => 08732512 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-20 [patent_title] => 'Semiconductor device having DLL circuit' [patent_app_type] => utility [patent_app_number] => 13/291733 [patent_app_country] => US [patent_app_date] => 2011-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6145 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13291733 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/291733
Semiconductor device having DLL circuit Nov 7, 2011 Issued
Array ( [id] => 9680543 [patent_doc_number] => 08819470 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-26 [patent_title] => 'Switching device, a switching device control method and a switching device control program' [patent_app_type] => utility [patent_app_number] => 13/290614 [patent_app_country] => US [patent_app_date] => 2011-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5153 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13290614 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/290614
Switching device, a switching device control method and a switching device control program Nov 6, 2011 Issued
Array ( [id] => 8222956 [patent_doc_number] => 20120137156 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-31 [patent_title] => 'CONTROLLING CIRCUIT WITH POWER SAVING MECHANISM AND ERRONEOUS WAKE-UP PREVENTING MECHANISM AND METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/290134 [patent_app_country] => US [patent_app_date] => 2011-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7253 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13290134 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/290134
Controlling circuit with power saving mechanism and method thereof Nov 6, 2011 Issued
Array ( [id] => 9169832 [patent_doc_number] => 08595525 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-11-26 [patent_title] => 'On-chip thermal management techniques using inter-processor time dependent power density data for indentification of thermal aggressors' [patent_app_type] => utility [patent_app_number] => 13/290456 [patent_app_country] => US [patent_app_date] => 2011-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9250 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13290456 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/290456
On-chip thermal management techniques using inter-processor time dependent power density data for indentification of thermal aggressors Nov 6, 2011 Issued
Array ( [id] => 8218073 [patent_doc_number] => 20120133402 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-31 [patent_title] => 'SEMICONDUCTOR DEVICE HAVING MULTIPLEXER' [patent_app_type] => utility [patent_app_number] => 13/290541 [patent_app_country] => US [patent_app_date] => 2011-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 8294 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13290541 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/290541
Semiconductor device having multiplexer Nov 6, 2011 Issued
Array ( [id] => 8170127 [patent_doc_number] => 20120106663 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-03 [patent_title] => 'METHOD FOR TRANSMITTING DATA' [patent_app_type] => utility [patent_app_number] => 13/286880 [patent_app_country] => US [patent_app_date] => 2011-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4670 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0106/20120106663.pdf [firstpage_image] =>[orig_patent_app_number] => 13286880 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/286880
METHOD FOR TRANSMITTING DATA Oct 31, 2011 Abandoned
Array ( [id] => 8337349 [patent_doc_number] => 20120204056 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-09 [patent_title] => 'Power Signature Obfuscation' [patent_app_type] => utility [patent_app_number] => 13/317600 [patent_app_country] => US [patent_app_date] => 2011-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5466 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13317600 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/317600
Power Signature Obfuscation Oct 23, 2011 Abandoned
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