Search

Erica E. Cadugan

Examiner (ID: 10388, Phone: (571)272-4474 , Office: P/3722 )

Most Active Art Unit
3722
Art Unit(s)
3726, 3722
Total Applications
1811
Issued Applications
1337
Pending Applications
125
Abandoned Applications
364

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9029671 [patent_doc_number] => 08539267 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-09-17 [patent_title] => 'Image forming apparatus and power management method thereof' [patent_app_type] => utility [patent_app_number] => 12/923348 [patent_app_country] => US [patent_app_date] => 2010-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7570 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12923348 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/923348
Image forming apparatus and power management method thereof Sep 14, 2010 Issued
Array ( [id] => 7792833 [patent_doc_number] => 20120054389 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-01 [patent_title] => 'USB To I2C And SPI Bridge' [patent_app_type] => utility [patent_app_number] => 12/869357 [patent_app_country] => US [patent_app_date] => 2010-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3094 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0054/20120054389.pdf [firstpage_image] =>[orig_patent_app_number] => 12869357 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/869357
USB To I2C And SPI Bridge Aug 25, 2010 Abandoned
Array ( [id] => 9248357 [patent_doc_number] => 08612658 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-12-17 [patent_title] => 'Interrupt reduction' [patent_app_type] => utility [patent_app_number] => 12/862526 [patent_app_country] => US [patent_app_date] => 2010-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4750 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12862526 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/862526
Interrupt reduction Aug 23, 2010 Issued
Array ( [id] => 8438236 [patent_doc_number] => 08286020 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-09 [patent_title] => 'Power supply and protection method thereof' [patent_app_type] => utility [patent_app_number] => 12/848194 [patent_app_country] => US [patent_app_date] => 2010-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2386 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12848194 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/848194
Power supply and protection method thereof Jul 31, 2010 Issued
Array ( [id] => 8678551 [patent_doc_number] => 08386686 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-02-26 [patent_title] => 'Cloud computer' [patent_app_type] => utility [patent_app_number] => 12/844987 [patent_app_country] => US [patent_app_date] => 2010-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1156 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12844987 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/844987
Cloud computer Jul 27, 2010 Issued
Array ( [id] => 6530312 [patent_doc_number] => 20100287325 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-11-11 [patent_title] => 'INTEGRATING NON-PERIPHERAL COMPONENT INTERCONNECT (PCI) RESOURCES INTO A PERSONAL COMPUTER SYSTEM' [patent_app_type] => utility [patent_app_number] => 12/841889 [patent_app_country] => US [patent_app_date] => 2010-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1781 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0287/20100287325.pdf [firstpage_image] =>[orig_patent_app_number] => 12841889 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/841889
Integrating non-peripheral component interconnect (PCI) resource into a personal computer system Jul 21, 2010 Issued
Array ( [id] => 7798344 [patent_doc_number] => 08127062 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-02-28 [patent_title] => 'Interlocking input/outputs on a virtual logic unit number' [patent_app_type] => utility [patent_app_number] => 12/841938 [patent_app_country] => US [patent_app_date] => 2010-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 5820 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/127/08127062.pdf [firstpage_image] =>[orig_patent_app_number] => 12841938 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/841938
Interlocking input/outputs on a virtual logic unit number Jul 21, 2010 Issued
Array ( [id] => 7746902 [patent_doc_number] => 20120023345 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-26 [patent_title] => 'MANAGING CURRENT AND POWER IN A COMPUTING SYSTEM' [patent_app_type] => utility [patent_app_number] => 12/840813 [patent_app_country] => US [patent_app_date] => 2010-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 11095 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0023/20120023345.pdf [firstpage_image] =>[orig_patent_app_number] => 12840813 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/840813
Managing current and power in a computing system Jul 20, 2010 Issued
Array ( [id] => 7735860 [patent_doc_number] => 20120017107 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-19 [patent_title] => 'SYNCHRONOUS BUS DRIVING WITH REPEATERS' [patent_app_type] => utility [patent_app_number] => 12/838231 [patent_app_country] => US [patent_app_date] => 2010-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6060 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0017/20120017107.pdf [firstpage_image] =>[orig_patent_app_number] => 12838231 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/838231
Synchronous bus driving with repeaters Jul 15, 2010 Issued
Array ( [id] => 8716144 [patent_doc_number] => 08402295 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-19 [patent_title] => 'Techniques employing flits for clock gating' [patent_app_type] => utility [patent_app_number] => 12/833298 [patent_app_country] => US [patent_app_date] => 2010-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3466 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12833298 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/833298
Techniques employing flits for clock gating Jul 8, 2010 Issued
Array ( [id] => 6057468 [patent_doc_number] => 20110113271 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-12 [patent_title] => 'METHOD AND DEVICE FOR THE DYNAMIC MANAGEMENT OF CONSUMPTION IN A PROCESSOR' [patent_app_type] => utility [patent_app_number] => 12/831756 [patent_app_country] => US [patent_app_date] => 2010-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3717 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0113/20110113271.pdf [firstpage_image] =>[orig_patent_app_number] => 12831756 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/831756
Method and device for the dynamic management of consumption in a processor Jul 6, 2010 Issued
Array ( [id] => 7714232 [patent_doc_number] => 20120005506 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-05 [patent_title] => 'SYSTEMS AND METHODS FOR IMPLEMENTING REDUCED POWER STATES' [patent_app_type] => utility [patent_app_number] => 12/828221 [patent_app_country] => US [patent_app_date] => 2010-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2181 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0005/20120005506.pdf [firstpage_image] =>[orig_patent_app_number] => 12828221 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/828221
Systems and methods for implementing reduced power states Jun 29, 2010 Issued
Array ( [id] => 7671402 [patent_doc_number] => 20110320671 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-29 [patent_title] => 'MOVING OWNERSHIP OF A DEVICE BETWEEN COMPUTE ELEMENTS' [patent_app_type] => utility [patent_app_number] => 12/822867 [patent_app_country] => US [patent_app_date] => 2010-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 15732 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12822867 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/822867
Moving ownership of a device between compute elements Jun 23, 2010 Issued
Array ( [id] => 8799522 [patent_doc_number] => 08438410 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-07 [patent_title] => 'Memory power management via dynamic memory operation states' [patent_app_type] => utility [patent_app_number] => 12/821867 [patent_app_country] => US [patent_app_date] => 2010-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2858 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12821867 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/821867
Memory power management via dynamic memory operation states Jun 22, 2010 Issued
Array ( [id] => 8632899 [patent_doc_number] => 08364999 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-01-29 [patent_title] => 'System and method for processor workload metering' [patent_app_type] => utility [patent_app_number] => 12/821860 [patent_app_country] => US [patent_app_date] => 2010-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5710 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12821860 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/821860
System and method for processor workload metering Jun 22, 2010 Issued
Array ( [id] => 8284214 [patent_doc_number] => 08218322 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-10 [patent_title] => 'Modular computing environments' [patent_app_type] => utility [patent_app_number] => 12/815892 [patent_app_country] => US [patent_app_date] => 2010-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 11858 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12815892 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/815892
Modular computing environments Jun 14, 2010 Issued
Array ( [id] => 6131762 [patent_doc_number] => 20110006835 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-13 [patent_title] => 'MULTI-CHIP SYSTEM' [patent_app_type] => utility [patent_app_number] => 12/797813 [patent_app_country] => US [patent_app_date] => 2010-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5520 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0006/20110006835.pdf [firstpage_image] =>[orig_patent_app_number] => 12797813 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/797813
MULTI-CHIP SYSTEM Jun 9, 2010 Abandoned
Array ( [id] => 7653081 [patent_doc_number] => 20110302350 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-08 [patent_title] => 'Switching interface method for a multi-interface storage device' [patent_app_type] => utility [patent_app_number] => 12/802494 [patent_app_country] => US [patent_app_date] => 2010-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2878 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0302/20110302350.pdf [firstpage_image] =>[orig_patent_app_number] => 12802494 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/802494
Switching interface method for a multi-interface storage device Jun 7, 2010 Issued
Array ( [id] => 9326134 [patent_doc_number] => 08661171 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-02-25 [patent_title] => 'Host-slave interface for wireless communication circuit' [patent_app_type] => utility [patent_app_number] => 12/795261 [patent_app_country] => US [patent_app_date] => 2010-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4028 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12795261 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/795261
Host-slave interface for wireless communication circuit Jun 6, 2010 Issued
Array ( [id] => 9348153 [patent_doc_number] => 08667316 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-03-04 [patent_title] => 'Precision synchronisation architecture for superspeed universal serial bus devices' [patent_app_type] => utility [patent_app_number] => 13/320401 [patent_app_country] => US [patent_app_date] => 2010-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 10582 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13320401 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/320401
Precision synchronisation architecture for superspeed universal serial bus devices May 19, 2010 Issued
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