Search

Erin Flanagan Bergner

Examiner (ID: 6099, Phone: (571)270-1133 , Office: P/1713 )

Most Active Art Unit
1713
Art Unit(s)
1713
Total Applications
753
Issued Applications
525
Pending Applications
78
Abandoned Applications
167

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18414785 [patent_doc_number] => 11669327 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-06 [patent_title] => Computing device and method for loading data [patent_app_type] => utility [patent_app_number] => 17/523833 [patent_app_country] => US [patent_app_date] => 2021-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5403 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17523833 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/523833
Computing device and method for loading data Nov 9, 2021 Issued
Array ( [id] => 18622460 [patent_doc_number] => 11755503 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-12 [patent_title] => Persisting directory onto remote storage nodes and smart downloader/uploader based on speed of peers [patent_app_type] => utility [patent_app_number] => 17/452363 [patent_app_country] => US [patent_app_date] => 2021-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8939 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17452363 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/452363
Persisting directory onto remote storage nodes and smart downloader/uploader based on speed of peers Oct 25, 2021 Issued
Array ( [id] => 19078108 [patent_doc_number] => 11947473 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-02 [patent_title] => Duplicated registers in chiplet processing units [patent_app_type] => utility [patent_app_number] => 17/499494 [patent_app_country] => US [patent_app_date] => 2021-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4833 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17499494 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/499494
Duplicated registers in chiplet processing units Oct 11, 2021 Issued
Array ( [id] => 17375681 [patent_doc_number] => 20220030733 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-27 [patent_title] => DISTRIBUTED MODULAR INPUT/OUTPUT (I/O) SYSTEM WITH REDUNDANT ETHERNET BACKPLANE NETWORKS FOR IMPROVED FAULT TOLERANCE [patent_app_type] => utility [patent_app_number] => 17/496072 [patent_app_country] => US [patent_app_date] => 2021-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4092 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17496072 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/496072
Distributed modular input/output (I/O) system with redundant ethernet backplane networks for improved fault tolerance Oct 6, 2021 Issued
Array ( [id] => 18669707 [patent_doc_number] => 11776617 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-03 [patent_title] => Application processors and electronic devices including the same [patent_app_type] => utility [patent_app_number] => 17/495690 [patent_app_country] => US [patent_app_date] => 2021-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 24 [patent_no_of_words] => 12373 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17495690 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/495690
Application processors and electronic devices including the same Oct 5, 2021 Issued
Array ( [id] => 17359602 [patent_doc_number] => 20220020398 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-20 [patent_title] => IDENTIFICATION OF STORAGE RESOURCES IN MULTIPLE DOMAINS [patent_app_type] => utility [patent_app_number] => 17/489187 [patent_app_country] => US [patent_app_date] => 2021-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4680 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17489187 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/489187
Identification of storage resources in multiple domains Sep 28, 2021 Issued
Array ( [id] => 18119339 [patent_doc_number] => 11550734 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-01-10 [patent_title] => Generation of host connectivity plans with load balancing and resiliency [patent_app_type] => utility [patent_app_number] => 17/482935 [patent_app_country] => US [patent_app_date] => 2021-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 7539 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17482935 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/482935
Generation of host connectivity plans with load balancing and resiliency Sep 22, 2021 Issued
Array ( [id] => 17809529 [patent_doc_number] => 20220261364 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-18 [patent_title] => Compile Time Instrumentation of Data Flow Graphs [patent_app_type] => utility [patent_app_number] => 17/479861 [patent_app_country] => US [patent_app_date] => 2021-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 23864 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17479861 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/479861
Compile time instrumentation of data flow graphs Sep 19, 2021 Issued
Array ( [id] => 17316828 [patent_doc_number] => 20210405877 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-30 [patent_title] => HBM BASED MEMORY LOOKUP ENGINE FOR DEEP LEARNING ACCELERATOR [patent_app_type] => utility [patent_app_number] => 17/473532 [patent_app_country] => US [patent_app_date] => 2021-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6181 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 244 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17473532 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/473532
HBM based memory lookup engine for deep learning accelerator Sep 12, 2021 Issued
Array ( [id] => 18904760 [patent_doc_number] => 20240020245 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-18 [patent_title] => ELECTRONIC CONTROL DEVICE [patent_app_type] => utility [patent_app_number] => 18/254451 [patent_app_country] => US [patent_app_date] => 2021-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10145 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18254451 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/254451
Electronic control device Sep 8, 2021 Issued
Array ( [id] => 17295795 [patent_doc_number] => 20210391634 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-16 [patent_title] => RECTANGULAR WAVEGUIDE COMMUNICATION BETWEEN MEMORY AND PROCESSOR [patent_app_type] => utility [patent_app_number] => 17/461539 [patent_app_country] => US [patent_app_date] => 2021-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3373 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17461539 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/461539
Rectangular waveguide communication between memory and processor Aug 29, 2021 Issued
Array ( [id] => 20265922 [patent_doc_number] => 12436914 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-07 [patent_title] => Acceleration unit, acceleration assembly, acceleration device, and electronic device [patent_app_type] => utility [patent_app_number] => 18/003670 [patent_app_country] => US [patent_app_date] => 2021-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 10004 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18003670 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/003670
Acceleration unit, acceleration assembly, acceleration device, and electronic device Aug 29, 2021 Issued
Array ( [id] => 17276427 [patent_doc_number] => 20210382625 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-09 [patent_title] => Writing Data Using References To Previously Stored Data [patent_app_type] => utility [patent_app_number] => 17/406421 [patent_app_country] => US [patent_app_date] => 2021-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6581 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17406421 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/406421
Writing data using references to previously stored data Aug 18, 2021 Issued
Array ( [id] => 17230793 [patent_doc_number] => 20210357350 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-18 [patent_title] => DYNAMIC PRESENTATION OF INTERCONNECT PROTOCOL CAPABILITY STRUCTURES [patent_app_type] => utility [patent_app_number] => 17/387261 [patent_app_country] => US [patent_app_date] => 2021-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14038 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17387261 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/387261
Dynamic presentation of interconnect protocol capability structures Jul 27, 2021 Issued
Array ( [id] => 18855654 [patent_doc_number] => 11853232 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-26 [patent_title] => Device, method and computer program [patent_app_type] => utility [patent_app_number] => 17/383453 [patent_app_country] => US [patent_app_date] => 2021-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 10445 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17383453 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/383453
Device, method and computer program Jul 22, 2021 Issued
Array ( [id] => 18688195 [patent_doc_number] => 11783938 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-10 [patent_title] => Integrated hub systems control interfaces and connections [patent_app_type] => utility [patent_app_number] => 17/384164 [patent_app_country] => US [patent_app_date] => 2021-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 23643 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17384164 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/384164
Integrated hub systems control interfaces and connections Jul 22, 2021 Issued
Array ( [id] => 17462325 [patent_doc_number] => 20220075630 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-10 [patent_title] => NON-TRANSITORY RECORDING MEDIUM, INFORMATION PROCESSING DEVICE, AND INFORMATION PROCESSING SYSTEM [patent_app_type] => utility [patent_app_number] => 17/378784 [patent_app_country] => US [patent_app_date] => 2021-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7435 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17378784 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/378784
NON-TRANSITORY RECORDING MEDIUM, INFORMATION PROCESSING DEVICE, AND INFORMATION PROCESSING SYSTEM Jul 18, 2021 Abandoned
Array ( [id] => 19342615 [patent_doc_number] => 12052822 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-30 [patent_title] => Electronic device including host box and one or more extension boxes [patent_app_type] => utility [patent_app_number] => 17/375307 [patent_app_country] => US [patent_app_date] => 2021-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7387 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17375307 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/375307
Electronic device including host box and one or more extension boxes Jul 13, 2021 Issued
Array ( [id] => 17597902 [patent_doc_number] => 20220147476 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-12 [patent_title] => MEMORY DEVICE INCLUDING DIRECT MEMORY ACCESS ENGINE, SYSTEM INCLUDING THE MEMORY DEVICE, AND METHOD OF OPERATING THE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/368981 [patent_app_country] => US [patent_app_date] => 2021-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10351 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17368981 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/368981
Memory device including direct memory access engine, system including the memory device, and method of operating the memory device Jul 6, 2021 Issued
Array ( [id] => 17172620 [patent_doc_number] => 20210326290 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-21 [patent_title] => UNIFIED SYSTEMS AND METHODS FOR INTERCHIP AND INTRACHIP NODE COMMUNICATION [patent_app_type] => utility [patent_app_number] => 17/363407 [patent_app_country] => US [patent_app_date] => 2021-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9265 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17363407 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/363407
Unified systems and methods for interchip and intrachip node communication Jun 29, 2021 Issued
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