
Erinne R. Dabkowski
Examiner (ID: 15368, Phone: (571)272-1829 , Office: P/1675 )
| Most Active Art Unit | 1654 |
| Art Unit(s) | 1654, 1675 |
| Total Applications | 874 |
| Issued Applications | 389 |
| Pending Applications | 143 |
| Abandoned Applications | 363 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 14204637
[patent_doc_number] => 10269438
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-04-23
[patent_title] => Nonvolatile memory device for performing a partial read operation and a method of reading the same
[patent_app_type] => utility
[patent_app_number] => 15/701801
[patent_app_country] => US
[patent_app_date] => 2017-09-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 10939
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 204
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15701801
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/701801 | Nonvolatile memory device for performing a partial read operation and a method of reading the same | Sep 11, 2017 | Issued |
Array
(
[id] => 13451341
[patent_doc_number] => 20180277213
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-09-27
[patent_title] => SEMICONDUCTOR INTEGRATED CIRCUIT
[patent_app_type] => utility
[patent_app_number] => 15/701533
[patent_app_country] => US
[patent_app_date] => 2017-09-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6212
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 55
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15701533
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/701533 | Semiconductor integrated circuit | Sep 11, 2017 | Issued |
Array
(
[id] => 13392809
[patent_doc_number] => 20180247947
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-08-30
[patent_title] => MEMORY SYSTEM AND METHOD FOR CONTROLLING NONVOLATILE MEMORY
[patent_app_type] => utility
[patent_app_number] => 15/700365
[patent_app_country] => US
[patent_app_date] => 2017-09-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 24575
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 226
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15700365
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/700365 | Memory system and method for controlling nonvolatile memory | Sep 10, 2017 | Issued |
Array
(
[id] => 13187657
[patent_doc_number] => 10109354
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-10-23
[patent_title] => Storage device and method for managing storage device
[patent_app_type] => utility
[patent_app_number] => 15/701025
[patent_app_country] => US
[patent_app_date] => 2017-09-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 18
[patent_no_of_words] => 12820
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 99
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15701025
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/701025 | Storage device and method for managing storage device | Sep 10, 2017 | Issued |
Array
(
[id] => 13056629
[patent_doc_number] => 10049710
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-08-14
[patent_title] => Magnetic article and rotation of magnetic spins via spin-orbit effect in same
[patent_app_type] => utility
[patent_app_number] => 15/695173
[patent_app_country] => US
[patent_app_date] => 2017-09-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 15
[patent_no_of_words] => 8591
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 274
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15695173
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/695173 | Magnetic article and rotation of magnetic spins via spin-orbit effect in same | Sep 4, 2017 | Issued |
Array
(
[id] => 13708769
[patent_doc_number] => 20170365339
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-12-21
[patent_title] => Memory Programming Methods and Memory Systems
[patent_app_type] => utility
[patent_app_number] => 15/690744
[patent_app_country] => US
[patent_app_date] => 2017-08-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6105
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15690744
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/690744 | Memory programming methods and memory systems | Aug 29, 2017 | Issued |
Array
(
[id] => 12235840
[patent_doc_number] => 20180068703
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-03-08
[patent_title] => 'MAGNONIC HOLOGRAPHIC MEMORY AND METHODS'
[patent_app_type] => utility
[patent_app_number] => 15/691647
[patent_app_country] => US
[patent_app_date] => 2017-08-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 8017
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15691647
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/691647 | MAGNONIC HOLOGRAPHIC MEMORY AND METHODS | Aug 29, 2017 | Abandoned |
Array
(
[id] => 14614489
[patent_doc_number] => 10359944
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-07-23
[patent_title] => Memory devices having distributed controller systems
[patent_app_type] => utility
[patent_app_number] => 15/690320
[patent_app_country] => US
[patent_app_date] => 2017-08-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4105
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 160
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15690320
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/690320 | Memory devices having distributed controller systems | Aug 29, 2017 | Issued |
Array
(
[id] => 12375090
[patent_doc_number] => 09959922
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-05-01
[patent_title] => Semiconductor device having input/output line drive circuit and semiconductor system including the same
[patent_app_type] => utility
[patent_app_number] => 15/689893
[patent_app_country] => US
[patent_app_date] => 2017-08-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 10095
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15689893
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/689893 | Semiconductor device having input/output line drive circuit and semiconductor system including the same | Aug 28, 2017 | Issued |
Array
(
[id] => 12229641
[patent_doc_number] => 09916887
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-03-13
[patent_title] => 'Semiconductor device having input/output line drive circuit and semiconductor system including the same'
[patent_app_type] => utility
[patent_app_number] => 15/689907
[patent_app_country] => US
[patent_app_date] => 2017-08-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 10791
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15689907
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/689907 | Semiconductor device having input/output line drive circuit and semiconductor system including the same | Aug 28, 2017 | Issued |
Array
(
[id] => 15170191
[patent_doc_number] => 10490601
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-11-26
[patent_title] => Bottom pinned SOT-MRAM bit structure and method of fabrication
[patent_app_type] => utility
[patent_app_number] => 15/684892
[patent_app_country] => US
[patent_app_date] => 2017-08-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 22
[patent_no_of_words] => 5380
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15684892
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/684892 | Bottom pinned SOT-MRAM bit structure and method of fabrication | Aug 22, 2017 | Issued |
Array
(
[id] => 13709305
[patent_doc_number] => 20170365607
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-12-21
[patent_title] => Method of Operating Semiconductor Memory Device with Floating Body Transistor Using Silicon Controlled Rectifier Principle
[patent_app_type] => utility
[patent_app_number] => 15/675523
[patent_app_country] => US
[patent_app_date] => 2017-08-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6788
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15675523
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/675523 | Method of operating semiconductor memory device with floating body transisor using silicon controlled rectifier principle | Aug 10, 2017 | Issued |
Array
(
[id] => 15249791
[patent_doc_number] => 10510423
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-12-17
[patent_title] => Mitigating disturbances of memory cells
[patent_app_type] => utility
[patent_app_number] => 15/669785
[patent_app_country] => US
[patent_app_date] => 2017-08-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 19281
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 91
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15669785
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/669785 | Mitigating disturbances of memory cells | Aug 3, 2017 | Issued |
Array
(
[id] => 14397263
[patent_doc_number] => 10311919
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-06-04
[patent_title] => Apparatuses and methods for calibrating sense amplifiers in a semiconductor memory
[patent_app_type] => utility
[patent_app_number] => 15/662059
[patent_app_country] => US
[patent_app_date] => 2017-07-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 9105
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 58
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15662059
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/662059 | Apparatuses and methods for calibrating sense amplifiers in a semiconductor memory | Jul 26, 2017 | Issued |
Array
(
[id] => 14769443
[patent_doc_number] => 10396123
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-08-27
[patent_title] => Templating layers for perpendicularly magnetized Heusler films
[patent_app_type] => utility
[patent_app_number] => 15/660681
[patent_app_country] => US
[patent_app_date] => 2017-07-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 3546
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 72
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15660681
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/660681 | Templating layers for perpendicularly magnetized Heusler films | Jul 25, 2017 | Issued |
Array
(
[id] => 12456666
[patent_doc_number] => 09984758
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-05-29
[patent_title] => Non-volatile memory device and method of fabricating the same
[patent_app_type] => utility
[patent_app_number] => 15/658293
[patent_app_country] => US
[patent_app_date] => 2017-07-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 20
[patent_no_of_words] => 11482
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 53
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15658293
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/658293 | Non-volatile memory device and method of fabricating the same | Jul 23, 2017 | Issued |
Array
(
[id] => 12004163
[patent_doc_number] => 20170308318
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-10-26
[patent_title] => 'Flash memory controller'
[patent_app_type] => utility
[patent_app_number] => 15/643501
[patent_app_country] => US
[patent_app_date] => 2017-07-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4969
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15643501
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/643501 | Flash memory controller | Jul 6, 2017 | Issued |
Array
(
[id] => 13784929
[patent_doc_number] => 20190006003
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-01-03
[patent_title] => COMPACTING OPERATING PARAMETER GROUPS IN SOLID STATE MEMORY DEVICES
[patent_app_type] => utility
[patent_app_number] => 15/640297
[patent_app_country] => US
[patent_app_date] => 2017-06-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12645
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -21
[patent_words_short_claim] => 162
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15640297
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/640297 | Compacting operating parameter groups in solid state memory devices | Jun 29, 2017 | Issued |
Array
(
[id] => 12631053
[patent_doc_number] => 20180102181
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-04-12
[patent_title] => MEMORY CIRCUIT WITH ASSIST CIRCUIT TRIMMING
[patent_app_type] => utility
[patent_app_number] => 15/621118
[patent_app_country] => US
[patent_app_date] => 2017-06-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5604
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 63
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15621118
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/621118 | Memory circuit with assist circuit trimming | Jun 12, 2017 | Issued |
Array
(
[id] => 12033582
[patent_doc_number] => 20170323681
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-11-09
[patent_title] => 'GLOBAL BIT LINE PRE-CHARGE CIRCUIT THAT COMPENSATES FOR PROCESS, OPERATING VOLTAGE, AND TEMPERATURE VARIATIONS'
[patent_app_type] => utility
[patent_app_number] => 15/596499
[patent_app_country] => US
[patent_app_date] => 2017-05-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 24
[patent_no_of_words] => 12941
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15596499
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/596499 | Global bit line pre-charge circuit that compensates for process, operating voltage, and temperature variations | May 15, 2017 | Issued |