| Application number | Title of the application | Filing Date | Status |
|---|
Array
(
[id] => 19007828
[patent_doc_number] => 20240071899
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-02-29
[patent_title] => SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/450836
[patent_app_country] => US
[patent_app_date] => 2023-08-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9784
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18450836
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/450836 | SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF | Aug 15, 2023 | Pending |
Array
(
[id] => 19130961
[patent_doc_number] => 20240136314
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-04-25
[patent_title] => STACKED CHIP AND FABRICATION METHOD OF STACKED CHIP
[patent_app_type] => utility
[patent_app_number] => 18/450435
[patent_app_country] => US
[patent_app_date] => 2023-08-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7955
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -11
[patent_words_short_claim] => 140
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18450435
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/450435 | STACKED CHIP AND FABRICATION METHOD OF STACKED CHIP | Aug 15, 2023 | Pending |
Array
(
[id] => 19130961
[patent_doc_number] => 20240136314
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-04-25
[patent_title] => STACKED CHIP AND FABRICATION METHOD OF STACKED CHIP
[patent_app_type] => utility
[patent_app_number] => 18/450435
[patent_app_country] => US
[patent_app_date] => 2023-08-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7955
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -11
[patent_words_short_claim] => 140
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18450435
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/450435 | STACKED CHIP AND FABRICATION METHOD OF STACKED CHIP | Aug 14, 2023 | Pending |
Array
(
[id] => 19964865
[patent_doc_number] => 12334384
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-06-17
[patent_title] => Methods and apparatus for minimizing substrate backside damage
[patent_app_type] => utility
[patent_app_number] => 18/233751
[patent_app_country] => US
[patent_app_date] => 2023-08-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 1156
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 102
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18233751
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/233751 | Methods and apparatus for minimizing substrate backside damage | Aug 13, 2023 | Issued |
Array
(
[id] => 18833948
[patent_doc_number] => 20230402475
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-12-14
[patent_title] => IMAGING APPARATUS AND ELECTRONIC DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/447563
[patent_app_country] => US
[patent_app_date] => 2023-08-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 30193
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 81
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18447563
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/447563 | IMAGING APPARATUS AND ELECTRONIC DEVICE | Aug 9, 2023 | Pending |
Array
(
[id] => 19561833
[patent_doc_number] => 20240373625
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-11-07
[patent_title] => MEMORY DEVICES WITH PARTIALLY MISALIGNED GAP LOCATIONS AND METHODS OF MANUFACTURING THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/232580
[patent_app_country] => US
[patent_app_date] => 2023-08-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14153
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 142
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18232580
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/232580 | MEMORY DEVICES WITH PARTIALLY MISALIGNED GAP LOCATIONS AND METHODS OF MANUFACTURING THEREOF | Aug 9, 2023 | Pending |
Array
(
[id] => 19561833
[patent_doc_number] => 20240373625
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-11-07
[patent_title] => MEMORY DEVICES WITH PARTIALLY MISALIGNED GAP LOCATIONS AND METHODS OF MANUFACTURING THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/232580
[patent_app_country] => US
[patent_app_date] => 2023-08-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14153
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 142
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18232580
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/232580 | MEMORY DEVICES WITH PARTIALLY MISALIGNED GAP LOCATIONS AND METHODS OF MANUFACTURING THEREOF | Aug 9, 2023 | Pending |
Array
(
[id] => 18814981
[patent_doc_number] => 20230389319
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-11-30
[patent_title] => NON-VOLATILE MEMORY DEVICE AND METHOD OF MANUFACTURING SAME
[patent_app_type] => utility
[patent_app_number] => 18/446579
[patent_app_country] => US
[patent_app_date] => 2023-08-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5555
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 264
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18446579
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/446579 | Non-volatile memory device including a contour of an insulation film, located below a vertically oriented embedded body, having expanded portion corresponding to the second semicondutor portion of the lower structure | Aug 8, 2023 | Issued |
Array
(
[id] => 18991065
[patent_doc_number] => 20240063034
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-02-22
[patent_title] => INFORMATION PROCESSING SYSTEM, POWER ADJUSTMENT METHOD, AND HEAT TREATMENT APPARATUS
[patent_app_type] => utility
[patent_app_number] => 18/229471
[patent_app_country] => US
[patent_app_date] => 2023-08-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11797
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 98
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18229471
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/229471 | INFORMATION PROCESSING SYSTEM, POWER ADJUSTMENT METHOD, AND HEAT TREATMENT APPARATUS | Aug 1, 2023 | Pending |
Array
(
[id] => 18757451
[patent_doc_number] => 20230360913
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-11-09
[patent_title] => Method of Manufacturing Semiconductor Devices
[patent_app_type] => utility
[patent_app_number] => 18/356636
[patent_app_country] => US
[patent_app_date] => 2023-07-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7773
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 52
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18356636
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/356636 | Method of manufacturing semiconductor devices including the steps of removing one or more of the nanotubes from the stack of nanotubes, and/or removing spacers that surrounds each of the plurality of nanotubes, and forming gate dielectric and/or gate electrode to the nanotubes | Jul 20, 2023 | Issued |
Array
(
[id] => 18759690
[patent_doc_number] => 20230363179
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-11-09
[patent_title] => FABRICATION OF EMBEDDED MEMORY DEVICES UTILIZING A SELF ASSEMBLED MONOLAYER
[patent_app_type] => utility
[patent_app_number] => 18/351605
[patent_app_country] => US
[patent_app_date] => 2023-07-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5395
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18351605
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/351605 | Fabrication of embedded memory devices utilizing a self assembled monolayer | Jul 12, 2023 | Issued |
Array
(
[id] => 18661456
[patent_doc_number] => 20230307470
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-09-28
[patent_title] => SOLID-STATE IMAGING ELEMENT AND ELECTRONIC EQUIPMENT
[patent_app_type] => utility
[patent_app_number] => 18/203809
[patent_app_country] => US
[patent_app_date] => 2023-05-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9684
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -14
[patent_words_short_claim] => 166
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18203809
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/203809 | Solid state image sensor having a grid-patterned inter-pixel isolation section separating the photoelectric conversion sections of each of the pixels from one another and provided with protruding sections | May 30, 2023 | Issued |
Array
(
[id] => 18633678
[patent_doc_number] => 20230292614
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-09-14
[patent_title] => PHOTOELECTRIC CONVERSION ELEMENT AND SOLID-STATE IMAGING DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/318873
[patent_app_country] => US
[patent_app_date] => 2023-05-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 21076
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 203
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18318873
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/318873 | PHOTOELECTRIC CONVERSION ELEMENT AND SOLID-STATE IMAGING DEVICE | May 16, 2023 | Abandoned |
Array
(
[id] => 20177607
[patent_doc_number] => 12396373
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-08-19
[patent_title] => Quantum information processing device formation
[patent_app_type] => utility
[patent_app_number] => 18/198192
[patent_app_country] => US
[patent_app_date] => 2023-05-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 36
[patent_no_of_words] => 1069
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 233
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18198192
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/198192 | Quantum information processing device formation | May 15, 2023 | Issued |
Array
(
[id] => 20177607
[patent_doc_number] => 12396373
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-08-19
[patent_title] => Quantum information processing device formation
[patent_app_type] => utility
[patent_app_number] => 18/198192
[patent_app_country] => US
[patent_app_date] => 2023-05-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 36
[patent_no_of_words] => 1069
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 233
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18198192
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/198192 | Quantum information processing device formation | May 15, 2023 | Issued |
Array
(
[id] => 18759755
[patent_doc_number] => 20230363245
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-11-09
[patent_title] => APPARATUS AND METHOD FOR MANUFACTURING DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/142479
[patent_app_country] => US
[patent_app_date] => 2023-05-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 18129
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -24
[patent_words_short_claim] => 78
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18142479
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/142479 | APPARATUS AND METHOD FOR MANUFACTURING DISPLAY DEVICE | May 1, 2023 | Pending |
Array
(
[id] => 18570826
[patent_doc_number] => 20230261163
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-08-17
[patent_title] => DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/138339
[patent_app_country] => US
[patent_app_date] => 2023-04-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10296
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -20
[patent_words_short_claim] => 45
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18138339
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/138339 | DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAME | Apr 23, 2023 | Pending |
Array
(
[id] => 18570826
[patent_doc_number] => 20230261163
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-08-17
[patent_title] => DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/138339
[patent_app_country] => US
[patent_app_date] => 2023-04-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10296
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -20
[patent_words_short_claim] => 45
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18138339
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/138339 | DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAME | Apr 23, 2023 | Pending |
Array
(
[id] => 18731496
[patent_doc_number] => 20230345805
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-10-26
[patent_title] => METHOD FOR MANUFACTURING A MULTI-CATION PEROVSKITE LAYER
[patent_app_type] => utility
[patent_app_number] => 18/305042
[patent_app_country] => US
[patent_app_date] => 2023-04-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5729
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 242
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18305042
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/305042 | METHOD FOR MANUFACTURING A MULTI-CATION PEROVSKITE LAYER | Apr 20, 2023 | Pending |
Array
(
[id] => 18539154
[patent_doc_number] => 20230244262
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-08-03
[patent_title] => SUBSTRATE CURRENT SUPPRESSION CIRCUIT, REFERENCE VOLTAGE GENERATION CIRCUIT, AND SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/299007
[patent_app_country] => US
[patent_app_date] => 2023-04-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6417
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 186
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18299007
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/299007 | Substrate current suppression circuit, reference voltage generation circuit, and semiconductor device | Apr 10, 2023 | Issued |