Search

Ermias T. Woldegeorgis

Examiner (ID: 9205, Phone: (571)270-5350 , Office: P/2893 )

Most Active Art Unit
2893
Art Unit(s)
2893, 2821
Total Applications
990
Issued Applications
699
Pending Applications
103
Abandoned Applications
225

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14101903 [patent_doc_number] => 20190092627 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-28 [patent_title] => a method for manufacturing a mems device by first hybrid bonding a cmos wafer to a mems wafer [patent_app_type] => utility [patent_app_number] => 15/855449 [patent_app_country] => US [patent_app_date] => 2017-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8245 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15855449 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/855449
Method for manufacturing a MEMS device by first hybrid bonding a CMOS wafer to a MEMS wafer Dec 26, 2017 Issued
Array ( [id] => 14509397 [patent_doc_number] => 20190198353 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-27 [patent_title] => SWITCH-MODE CONVERTER MODULE [patent_app_type] => utility [patent_app_number] => 15/855706 [patent_app_country] => US [patent_app_date] => 2017-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3317 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15855706 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/855706
Switch-mode converter module Dec 26, 2017 Issued
Array ( [id] => 16593858 [patent_doc_number] => 10903135 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-26 [patent_title] => Chip package structure and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 15/855752 [patent_app_country] => US [patent_app_date] => 2017-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4461 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15855752 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/855752
Chip package structure and manufacturing method thereof Dec 26, 2017 Issued
Array ( [id] => 17544175 [patent_doc_number] => 11309309 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-19 [patent_title] => Mother substrate and display panel [patent_app_type] => utility [patent_app_number] => 16/074352 [patent_app_country] => US [patent_app_date] => 2017-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 20 [patent_no_of_words] => 15662 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16074352 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/074352
Mother substrate and display panel Dec 17, 2017 Issued
Array ( [id] => 12650358 [patent_doc_number] => 20180108617 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-04-19 [patent_title] => ELECTRONIC CIRCUIT PACKAGE USING COMPOSITE MAGNETIC SEALING MATERIAL [patent_app_type] => utility [patent_app_number] => 15/844176 [patent_app_country] => US [patent_app_date] => 2017-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10563 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15844176 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/844176
Electronic circuit package using composite magnetic sealing material Dec 14, 2017 Issued
Array ( [id] => 12650418 [patent_doc_number] => 20180108637 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-04-19 [patent_title] => Methods of Packaging Semiconductor Devices and Packaged Semiconductor Devices [patent_app_type] => utility [patent_app_number] => 15/843507 [patent_app_country] => US [patent_app_date] => 2017-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4980 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15843507 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/843507
Methods of packaging semiconductor devices and packaged semiconductor devices Dec 14, 2017 Issued
Array ( [id] => 18482746 [patent_doc_number] => 11696515 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-04 [patent_title] => Quantum information processing device formation [patent_app_type] => utility [patent_app_number] => 16/640399 [patent_app_country] => US [patent_app_date] => 2017-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 36 [patent_no_of_words] => 6238 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16640399 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/640399
Quantum information processing device formation Dec 6, 2017 Issued
Array ( [id] => 14285209 [patent_doc_number] => 20190139889 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-09 [patent_title] => LOSSY MIM CAPACITOR FOR ON-DIE NOISE REDUCTION [patent_app_type] => utility [patent_app_number] => 15/803439 [patent_app_country] => US [patent_app_date] => 2017-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7036 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15803439 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/803439
Lossy MIM capacitor for on-die noise reduction Nov 2, 2017 Issued
Array ( [id] => 13320913 [patent_doc_number] => 20180211994 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-07-26 [patent_title] => ELECTRONIC DEVICE AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 15/802301 [patent_app_country] => US [patent_app_date] => 2017-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11741 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15802301 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/802301
ELECTRONIC DEVICE AND METHOD FOR FABRICATING THE SAME Nov 1, 2017 Abandoned
Array ( [id] => 12615186 [patent_doc_number] => 20180096892 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-04-05 [patent_title] => DEVICE WAFER PROCESSING METHOD [patent_app_type] => utility [patent_app_number] => 15/721036 [patent_app_country] => US [patent_app_date] => 2017-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7480 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15721036 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/721036
DEVICE WAFER PROCESSING METHOD Sep 28, 2017 Abandoned
Array ( [id] => 15234035 [patent_doc_number] => 10504747 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-12-10 [patent_title] => Method of gap filling using conformal deposition-annealing-etching cycle for reducing seam void and bending [patent_app_type] => utility [patent_app_number] => 15/720087 [patent_app_country] => US [patent_app_date] => 2017-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 42 [patent_no_of_words] => 7332 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15720087 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/720087
Method of gap filling using conformal deposition-annealing-etching cycle for reducing seam void and bending Sep 28, 2017 Issued
Array ( [id] => 14137799 [patent_doc_number] => 20190103289 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-04 [patent_title] => TECHNIQUES TO REDUCE SUBSTRATE REFLOW WARPAGE [patent_app_type] => utility [patent_app_number] => 15/720190 [patent_app_country] => US [patent_app_date] => 2017-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4991 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15720190 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/720190
TECHNIQUES TO REDUCE SUBSTRATE REFLOW WARPAGE Sep 28, 2017 Abandoned
Array ( [id] => 14137975 [patent_doc_number] => 20190103377 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-04 [patent_title] => METHODS OF FORMING JOINT STRUCTURES FOR SURFACE MOUNT PACKAGES [patent_app_type] => utility [patent_app_number] => 15/720480 [patent_app_country] => US [patent_app_date] => 2017-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6656 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15720480 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/720480
Methods of forming joint structures for surface mount packages Sep 28, 2017 Issued
Array ( [id] => 15906669 [patent_doc_number] => 20200152855 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-14 [patent_title] => INDUCTOR/CORE ASSEMBLIES FOR INTEGRATED CIRCUITS [patent_app_type] => utility [patent_app_number] => 16/631681 [patent_app_country] => US [patent_app_date] => 2017-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13842 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16631681 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/631681
Inductor/core assemblies for integrated circuits Sep 19, 2017 Issued
Array ( [id] => 16194314 [patent_doc_number] => 20200235163 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-23 [patent_title] => SELECTOR DEVICES [patent_app_type] => utility [patent_app_number] => 16/630924 [patent_app_country] => US [patent_app_date] => 2017-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10065 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16630924 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/630924
Selector devices Sep 13, 2017 Issued
Array ( [id] => 17136144 [patent_doc_number] => 11137695 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-05 [patent_title] => Method of determining a height profile, a measurement system and a computer readable medium [patent_app_type] => utility [patent_app_number] => 16/339273 [patent_app_country] => US [patent_app_date] => 2017-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4931 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16339273 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/339273
Method of determining a height profile, a measurement system and a computer readable medium Sep 7, 2017 Issued
Array ( [id] => 17136144 [patent_doc_number] => 11137695 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-05 [patent_title] => Method of determining a height profile, a measurement system and a computer readable medium [patent_app_type] => utility [patent_app_number] => 16/339273 [patent_app_country] => US [patent_app_date] => 2017-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4931 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16339273 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/339273
Method of determining a height profile, a measurement system and a computer readable medium Sep 7, 2017 Issued
Array ( [id] => 16677340 [patent_doc_number] => 20210066106 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-04 [patent_title] => PLATING CHUCK [patent_app_type] => utility [patent_app_number] => 16/644797 [patent_app_country] => US [patent_app_date] => 2017-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6156 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16644797 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/644797
Plating chuck Sep 6, 2017 Issued
Array ( [id] => 16172694 [patent_doc_number] => 10714270 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-14 [patent_title] => Photoelectric conversion device and method for manufacturing the same [patent_app_type] => utility [patent_app_number] => 15/690518 [patent_app_country] => US [patent_app_date] => 2017-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 7571 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15690518 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/690518
Photoelectric conversion device and method for manufacturing the same Aug 29, 2017 Issued
Array ( [id] => 12223751 [patent_doc_number] => 20180062111 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-01 [patent_title] => 'ORGANIC LIGHT-EMITTING DISPLAY DEVICE HAVING AN ADHESIVE LAYER BETWEEN A LOWER SUBSTRATE AND AN UPPER SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 15/690483 [patent_app_country] => US [patent_app_date] => 2017-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5772 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15690483 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/690483
Organic light-emitting display device having an adhesive layer between a lower substrate and an upper substrate Aug 29, 2017 Issued
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