Ermias T. Woldegeorgis

Array ( [id] => 10597461 [patent_doc_number] => 09318556 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-04-19 [patent_title] => 'Graphene transistor having tunable barrier' [patent_app_type] => utility [patent_app_number] => 14/328339 [patent_app_country] => US [patent_app_date] => 2014-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 4221 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14328339 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11783455 [patent_doc_number] => 09392697 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-07-12 [patent_title] => 'Package and method of manufacturing package thereof' [patent_app_type] => utility [patent_app_number] => 14/327713 [patent_app_country] => US [patent_app_date] => 2014-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3143 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14327713 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10260127 [patent_doc_number] => 20150145124 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-05-28 [patent_title] => 'SEMICONDUCTOR CHIPS WITH THROUGH-SILICON VIAS, AND SEMICONDUCTOR PACKAGES INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/327674 [patent_app_country] => US [patent_app_date] => 2014-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 39 [patent_no_of_words] => 8416 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14327674 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10350909 [patent_doc_number] => 20150235914 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-20 [patent_title] => 'FLIP-CHIP PACKAGING SUBSTRATE, FLIP-CHIP PACKAGE AND FABRICATION METHODS THEREOF' [patent_app_type] => utility [patent_app_number] => 14/328092 [patent_app_country] => US [patent_app_date] => 2014-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2189 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14328092 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10322404 [patent_doc_number] => 20150207407 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-23 [patent_title] => 'Semiconductor Device, Semiconductor Module, and Electronic Circuit' [patent_app_type] => utility [patent_app_number] => 14/327001 [patent_app_country] => US [patent_app_date] => 2014-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 18051 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14327001 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10329310 [patent_doc_number] => 20150214314 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-30 [patent_title] => 'DUAL WORK FUNCTION BURIED GATE TYPE TRANSISTOR AND METHOD FOR FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/327197 [patent_app_country] => US [patent_app_date] => 2014-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 8234 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14327197 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11510297 [patent_doc_number] => 09601463 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-03-21 [patent_title] => 'Fan-out stacked system in package (SIP) and the methods of making the same' [patent_app_type] => utility [patent_app_number] => 14/327203 [patent_app_country] => US [patent_app_date] => 2014-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 57 [patent_figures_cnt] => 82 [patent_no_of_words] => 13778 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 260 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14327203 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10667143 [patent_doc_number] => 20160013288 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-14 [patent_title] => 'METHOD OF FORMING A METAL GATE STRUCTURE' [patent_app_type] => utility [patent_app_number] => 14/326476 [patent_app_country] => US [patent_app_date] => 2014-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3636 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14326476 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10667033 [patent_doc_number] => 20160013177 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-14 [patent_title] => 'ESD PROTECTION DEVICE AND RELATED FABRICATION METHODS' [patent_app_type] => utility [patent_app_number] => 14/327191 [patent_app_country] => US [patent_app_date] => 2014-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 13464 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14327191 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11220251 [patent_doc_number] => 09448585 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-09-20 [patent_title] => 'Clamping structure, electronic device and clamping component' [patent_app_type] => utility [patent_app_number] => 14/325384 [patent_app_country] => US [patent_app_date] => 2014-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 5448 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14325384 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13640713 [patent_doc_number] => 09847317 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-12-19 [patent_title] => Methods of packaging semiconductor devices and packaged semiconductor devices [patent_app_type] => utility [patent_app_number] => 14/326228 [patent_app_country] => US [patent_app_date] => 2014-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 4941 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14326228 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12168331 [patent_doc_number] => 09887104 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-02-06 [patent_title] => 'Electronic package and method of connecting a first die to a second die to form an electronic package' [patent_app_type] => utility [patent_app_number] => 14/323077 [patent_app_country] => US [patent_app_date] => 2014-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 18 [patent_no_of_words] => 5910 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14323077 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10552995 [patent_doc_number] => 09277643 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-01 [patent_title] => 'S-shaped ceramic feedthrough' [patent_app_type] => utility [patent_app_number] => 14/323046 [patent_app_country] => US [patent_app_date] => 2014-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 2992 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14323046 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9928509 [patent_doc_number] => 20150076701 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-03-19 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/310380 [patent_app_country] => US [patent_app_date] => 2014-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3897 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14310380 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9855015 [patent_doc_number] => 20150035032 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-02-05 [patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY DEVICE INCLUDING MEMORY CELL ARRAY WITH PSEUDO SEPARATE SOURCE LINE STRUCTURE' [patent_app_type] => utility [patent_app_number] => 14/310114 [patent_app_country] => US [patent_app_date] => 2014-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 13582 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14310114 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9789585 [patent_doc_number] => 20150001529 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-01-01 [patent_title] => 'STORAGE DEVICE AND SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/310096 [patent_app_country] => US [patent_app_date] => 2014-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 16289 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14310096 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9789733 [patent_doc_number] => 20150001677 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-01-01 [patent_title] => 'SEMICONDUCTOR DEVICE INTEGRATING A VOLTAGE DIVIDER AND PROCESS FOR MANUFACTURING A SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/309357 [patent_app_country] => US [patent_app_date] => 2014-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4647 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14309357 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10971832 [patent_doc_number] => 20140374867 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-25 [patent_title] => 'Pinned Photodiode (PPD) Pixel Architecture With Separate Avalanche Region' [patent_app_type] => utility [patent_app_number] => 14/309712 [patent_app_country] => US [patent_app_date] => 2014-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4033 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14309712 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9789614 [patent_doc_number] => 20150001557 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-01-01 [patent_title] => 'SEMICONDUCTOR LIGHT EMITTING DEVICE AND METHOD FOR MANUFACTURING LIGHT SOURCE MODULE' [patent_app_type] => utility [patent_app_number] => 14/309628 [patent_app_country] => US [patent_app_date] => 2014-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 20810 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14309628 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10971712 [patent_doc_number] => 20140374747 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-25 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/309103 [patent_app_country] => US [patent_app_date] => 2014-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 28301 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14309103 [rel_patent_id] =>[rel_patent_doc_number] =>)