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Eron J. Sorrell

Examiner (ID: 18320, Phone: (571)272-4160 , Office: P/3992 )

Most Active Art Unit
2182
Art Unit(s)
3992, 2465, 2182, 2181
Total Applications
646
Issued Applications
465
Pending Applications
78
Abandoned Applications
114

Applications

Application numberTitle of the applicationFiling DateStatus
13/873948 METHOD AND APPARATUS FOR PIPELINED SCAN COMPRESSION Apr 29, 2013 Abandoned
90/012810 Mobile Tele-Computer Network for Motion Picture, Television and TV Advertising Production Mar 19, 2013 Pending
90/012789 MOBILE TELE-COMPUTER NETWORK FOR MOTION PICTURE, TELEVISION AND TV ADVERTISING PRODUCTION Feb 5, 2013 Issued
90/012786 Apparatus Having Signal Processors for Providing Respective Signals to Master Processor to Notify that Newly Written Data can be Obtained from One or More Memories Feb 4, 2013 Issued
90/020037 METHODS, APPARATUS, AND DEVICES FOR NOISE REDUCTION Dec 27, 2012 Issued
90/012728 Mobile Tele-Computer Network for Motion Picture, Television and TV Advertising Production Nov 28, 2012 Issued
95/002288 NETWORK COMMUNICATION SYSTEM WITH AN ALIGNMENT SIGNAL TO ALLOW A CONTROLLER TO PROVIDE MESSAGES TO NODES AND TRANSMISSION OF THE MESSAGES OVER FOUR INDEPENDENT FREQUENCIES Sep 13, 2012 Issued
90/012415 Emergency Facility Video-Conferencing System Sep 6, 2012 Issued
13/601970 Method for Displaying Web User's Authentication Status in a Distributed Single Login Network Aug 30, 2012 Abandoned
90/012449 Automated Meter Reading System Aug 22, 2012 Issued
95/002047 Methods, Apparatus, and Devices For Noise Reduction Jul 17, 2012 Issued
90/012364 SIGNAL PROCESSING UTILIZING A TREE-STRUCTURED ARRAY Jun 17, 2012 Issued
90/012345 SERVICE PROVISION SYSTEM FOR COMMUNICATIONS NETWORKS Jun 10, 2012 Issued
95/000671 METHOD AND APPARATUS FOR CONFIGURABLE ADDRESS MAPPING AND PROTECTION ARCHITECTURE AND HARDWARE FOR ON-CHIP SYSTEMS May 30, 2012 Issued
90/012322 Method for Mapping Environmental Resources to Memory for Program Access May 29, 2012 Issued
Array ( [id] => 7770261 [patent_doc_number] => 20120036288 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-09 [patent_title] => 'SYSTEMS AND METHODS FOR USING A SHARED BUFFER CONSTRUCT IN PERFORMANCE OF CONCURRENT DATA-DRIVEN TASKS' [patent_app_type] => utility [patent_app_number] => 13/275581 [patent_app_country] => US [patent_app_date] => 2011-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7208 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0036/20120036288.pdf [firstpage_image] =>[orig_patent_app_number] => 13275581 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/275581
Systems and methods for using a shared buffer construct in performance of concurrent data-driven tasks Oct 17, 2011 Issued
Array ( [id] => 7813332 [patent_doc_number] => 08135870 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-03-13 [patent_title] => 'Information processing apparatus and information processing method' [patent_app_type] => utility [patent_app_number] => 13/183159 [patent_app_country] => US [patent_app_date] => 2011-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6448 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/135/08135870.pdf [firstpage_image] =>[orig_patent_app_number] => 13183159 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/183159
Information processing apparatus and information processing method Jul 13, 2011 Issued
Array ( [id] => 8308587 [patent_doc_number] => 08230140 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-24 [patent_title] => 'Latency control circuit and method using queuing design method' [patent_app_type] => utility [patent_app_number] => 13/178846 [patent_app_country] => US [patent_app_date] => 2011-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4514 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13178846 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/178846
Latency control circuit and method using queuing design method Jul 7, 2011 Issued
Array ( [id] => 8170487 [patent_doc_number] => 08176215 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-05-08 [patent_title] => 'Semiconductor memory device and control method for semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 13/178681 [patent_app_country] => US [patent_app_date] => 2011-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 17 [patent_no_of_words] => 8328 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/176/08176215.pdf [firstpage_image] =>[orig_patent_app_number] => 13178681 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/178681
Semiconductor memory device and control method for semiconductor memory device Jul 7, 2011 Issued
Array ( [id] => 7664930 [patent_doc_number] => 20110314199 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-22 [patent_title] => 'APPARATUS AND METHOD FOR DIRECT MEMORY ACCESS IN A HUB-BASED MEMORY SYSTEM' [patent_app_type] => utility [patent_app_number] => 13/164156 [patent_app_country] => US [patent_app_date] => 2011-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5920 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13164156 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/164156
Apparatus and method for direct memory access in a hub-based memory system Jun 19, 2011 Issued
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