Search

Errol V. Fernandes

Examiner (ID: 15300, Phone: (571)270-7433 , Office: P/2894 )

Most Active Art Unit
2894
Art Unit(s)
2894, 2821, 2893
Total Applications
1197
Issued Applications
1012
Pending Applications
72
Abandoned Applications
130

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17196070 [patent_doc_number] => 11164837 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-11-02 [patent_title] => Semiconductor device packages with angled pillars for decreasing stress [patent_app_type] => utility [patent_app_number] => 16/879637 [patent_app_country] => US [patent_app_date] => 2020-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 4428 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16879637 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/879637
Semiconductor device packages with angled pillars for decreasing stress May 19, 2020 Issued
Array ( [id] => 16456122 [patent_doc_number] => 20200365548 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-19 [patent_title] => Semiconductor Package and Method of Forming a Semiconductor Package [patent_app_type] => utility [patent_app_number] => 16/875531 [patent_app_country] => US [patent_app_date] => 2020-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7413 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -25 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16875531 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/875531
Semiconductor package and method of forming a semiconductor package May 14, 2020 Issued
Array ( [id] => 18416023 [patent_doc_number] => 11670570 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-06 [patent_title] => Electronic device and method of manufacturing an electronic device [patent_app_type] => utility [patent_app_number] => 16/870068 [patent_app_country] => US [patent_app_date] => 2020-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 4578 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16870068 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/870068
Electronic device and method of manufacturing an electronic device May 7, 2020 Issued
Array ( [id] => 16904801 [patent_doc_number] => 20210183717 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-17 [patent_title] => IC HAVING A METAL RING THEREON FOR STRESS REDUCTION [patent_app_type] => utility [patent_app_number] => 16/859530 [patent_app_country] => US [patent_app_date] => 2020-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4065 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16859530 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/859530
IC having a metal ring thereon for stress reduction Apr 26, 2020 Issued
Array ( [id] => 16536462 [patent_doc_number] => 10879075 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-29 [patent_title] => Wrap-around contact plug and method manufacturing same [patent_app_type] => utility [patent_app_number] => 16/859125 [patent_app_country] => US [patent_app_date] => 2020-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 39 [patent_no_of_words] => 7450 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16859125 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/859125
Wrap-around contact plug and method manufacturing same Apr 26, 2020 Issued
Array ( [id] => 17493493 [patent_doc_number] => 11282808 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-22 [patent_title] => Inertial sensor, electronic instrument, vehicle, and method for manufacturing inertial sensor [patent_app_type] => utility [patent_app_number] => 16/857677 [patent_app_country] => US [patent_app_date] => 2020-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 33 [patent_no_of_words] => 12405 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16857677 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/857677
Inertial sensor, electronic instrument, vehicle, and method for manufacturing inertial sensor Apr 23, 2020 Issued
Array ( [id] => 16226293 [patent_doc_number] => 20200251410 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-06 [patent_title] => POWER MODULE AND MOTOR DRIVE CIRCUIT [patent_app_type] => utility [patent_app_number] => 16/853302 [patent_app_country] => US [patent_app_date] => 2020-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 34167 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16853302 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/853302
Power module and motor drive circuit Apr 19, 2020 Issued
Array ( [id] => 17395848 [patent_doc_number] => 11244872 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-08 [patent_title] => FinFET complementary metal-oxide-semiconductor (CMOS) devices [patent_app_type] => utility [patent_app_number] => 16/849279 [patent_app_country] => US [patent_app_date] => 2020-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 7681 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16849279 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/849279
FinFET complementary metal-oxide-semiconductor (CMOS) devices Apr 14, 2020 Issued
Array ( [id] => 16881351 [patent_doc_number] => 11031509 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-06-08 [patent_title] => Memory device and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 16/842788 [patent_app_country] => US [patent_app_date] => 2020-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 6362 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16842788 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/842788
Memory device and manufacturing method thereof Apr 7, 2020 Issued
Array ( [id] => 16566916 [patent_doc_number] => 10892293 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-12 [patent_title] => Solid-state imaging element, imaging device, and electronic device [patent_app_type] => utility [patent_app_number] => 16/837339 [patent_app_country] => US [patent_app_date] => 2020-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6569 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16837339 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/837339
Solid-state imaging element, imaging device, and electronic device Mar 31, 2020 Issued
Array ( [id] => 16180391 [patent_doc_number] => 20200227360 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-16 [patent_title] => WIRE BONDING METHOD AND APPARATUS FOR ELECTROMAGNETIC INTERFERENCE SHIELDING [patent_app_type] => utility [patent_app_number] => 16/833445 [patent_app_country] => US [patent_app_date] => 2020-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9709 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16833445 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/833445
Wire bonding method and apparatus for electromagnetic interference shielding Mar 26, 2020 Issued
Array ( [id] => 19168464 [patent_doc_number] => 11984377 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-14 [patent_title] => IC die and heat spreaders with solderable thermal interface structures for assemblies including solder array thermal interconnects [patent_app_type] => utility [patent_app_number] => 16/831068 [patent_app_country] => US [patent_app_date] => 2020-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 36 [patent_no_of_words] => 18738 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16831068 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/831068
IC die and heat spreaders with solderable thermal interface structures for assemblies including solder array thermal interconnects Mar 25, 2020 Issued
Array ( [id] => 17130368 [patent_doc_number] => 20210305137 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-30 [patent_title] => IoT and AI System Package with Solid-State Battery Enhanced Performance [patent_app_type] => utility [patent_app_number] => 16/830197 [patent_app_country] => US [patent_app_date] => 2020-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6339 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16830197 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/830197
IoT and AI system package with solid-state battery enhanced performance Mar 24, 2020 Issued
Array ( [id] => 17130655 [patent_doc_number] => 20210305424 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-30 [patent_title] => REDUCTION OF BOTTOM EPITAXY PARASITICS FOR VERTICAL TRANSPORT FIELD EFFECT TRANSISTORS [patent_app_type] => utility [patent_app_number] => 16/828409 [patent_app_country] => US [patent_app_date] => 2020-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7628 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16828409 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/828409
Reduction of bottom epitaxy parasitics for vertical transport field effect transistors Mar 23, 2020 Issued
Array ( [id] => 17048087 [patent_doc_number] => 11101277 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-24 [patent_title] => Process for manufacturing NOR memory cell with vertical floating gate [patent_app_type] => utility [patent_app_number] => 16/824384 [patent_app_country] => US [patent_app_date] => 2020-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 36 [patent_no_of_words] => 5661 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16824384 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/824384
Process for manufacturing NOR memory cell with vertical floating gate Mar 18, 2020 Issued
Array ( [id] => 16249395 [patent_doc_number] => 10748770 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-18 [patent_title] => Device and method for bonding of substrates [patent_app_type] => utility [patent_app_number] => 16/821139 [patent_app_country] => US [patent_app_date] => 2020-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 12137 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16821139 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/821139
Device and method for bonding of substrates Mar 16, 2020 Issued
Array ( [id] => 18292468 [patent_doc_number] => 11621341 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-04 [patent_title] => Semiconductor device and method for fabricating the same [patent_app_type] => utility [patent_app_number] => 16/820273 [patent_app_country] => US [patent_app_date] => 2020-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 11479 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 353 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16820273 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/820273
Semiconductor device and method for fabricating the same Mar 15, 2020 Issued
Array ( [id] => 16119993 [patent_doc_number] => 20200212019 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-02 [patent_title] => METHOD FOR FABRICATING ELECTRONIC PACKAGE [patent_app_type] => utility [patent_app_number] => 16/817001 [patent_app_country] => US [patent_app_date] => 2020-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3059 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16817001 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/817001
Method for fabricating electronic package Mar 11, 2020 Issued
Array ( [id] => 17083451 [patent_doc_number] => 20210278457 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-09 [patent_title] => PACKAGE STRUCTURE AND TESTING METHOD [patent_app_type] => utility [patent_app_number] => 16/812232 [patent_app_country] => US [patent_app_date] => 2020-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10544 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16812232 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/812232
Package structure and testing method Mar 5, 2020 Issued
Array ( [id] => 17500688 [patent_doc_number] => 11289398 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-29 [patent_title] => Package structure and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 16/805869 [patent_app_country] => US [patent_app_date] => 2020-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 17 [patent_no_of_words] => 6814 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16805869 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/805869
Package structure and manufacturing method thereof Mar 1, 2020 Issued
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