Search

Errol V. Fernandes

Examiner (ID: 15300, Phone: (571)270-7433 , Office: P/2894 )

Most Active Art Unit
2894
Art Unit(s)
2894, 2821, 2893
Total Applications
1197
Issued Applications
1012
Pending Applications
72
Abandoned Applications
130

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16789227 [patent_doc_number] => 10991666 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-27 [patent_title] => Location displacement detection method, location displacement detection device, and display device [patent_app_type] => utility [patent_app_number] => 16/216941 [patent_app_country] => US [patent_app_date] => 2018-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 27 [patent_no_of_words] => 7972 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16216941 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/216941
Location displacement detection method, location displacement detection device, and display device Dec 10, 2018 Issued
Array ( [id] => 14413743 [patent_doc_number] => 20190172715 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-06 [patent_title] => MANUFACTURING METHOD OF A SEMICONDUCTOR DEVICE WITH EFFICIENT EDGE STRUCTURE [patent_app_type] => utility [patent_app_number] => 16/209680 [patent_app_country] => US [patent_app_date] => 2018-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4933 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16209680 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/209680
Manufacturing method of a semiconductor device with efficient edge structure Dec 3, 2018 Issued
Array ( [id] => 16001093 [patent_doc_number] => 20200176417 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-04 [patent_title] => STACKED EMBEDDED PASSIVE SUBSTRATE STRUCTURE [patent_app_type] => utility [patent_app_number] => 16/209723 [patent_app_country] => US [patent_app_date] => 2018-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6747 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16209723 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/209723
STACKED EMBEDDED PASSIVE SUBSTRATE STRUCTURE Dec 3, 2018 Abandoned
Array ( [id] => 14784717 [patent_doc_number] => 20190267256 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-29 [patent_title] => SEMICONDUCTOR-MANUFACTURING APPARATUS AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/208661 [patent_app_country] => US [patent_app_date] => 2018-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5049 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16208661 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/208661
Semiconductor-manufacturing apparatus and method for manufacturing semiconductor device Dec 3, 2018 Issued
Array ( [id] => 14446991 [patent_doc_number] => 20190181369 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-13 [patent_title] => Illumination Device [patent_app_type] => utility [patent_app_number] => 16/209748 [patent_app_country] => US [patent_app_date] => 2018-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6984 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16209748 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/209748
Illumination device Dec 3, 2018 Issued
Array ( [id] => 16863052 [patent_doc_number] => 11021786 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-01 [patent_title] => Copper passivation [patent_app_type] => utility [patent_app_number] => 16/209513 [patent_app_country] => US [patent_app_date] => 2018-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 25 [patent_no_of_words] => 4243 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16209513 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/209513
Copper passivation Dec 3, 2018 Issued
Array ( [id] => 14413715 [patent_doc_number] => 20190172701 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-06 [patent_title] => UNIFORM DEPOSITION OF SiOC ON DIELECTRIC AND METAL SURFACES [patent_app_type] => utility [patent_app_number] => 16/208350 [patent_app_country] => US [patent_app_date] => 2018-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4579 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16208350 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/208350
Uniform deposition of SiOC on dielectric and metal surfaces Dec 2, 2018 Issued
Array ( [id] => 14163807 [patent_doc_number] => 20190109006 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-11 [patent_title] => Wrap-Around Contact Plug and Method Manufacturing Same [patent_app_type] => utility [patent_app_number] => 16/206252 [patent_app_country] => US [patent_app_date] => 2018-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7383 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16206252 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/206252
Wrap-around contact plug and method manufacturing same Nov 29, 2018 Issued
Array ( [id] => 15015383 [patent_doc_number] => 10453852 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-22 [patent_title] => Using three or more masks to define contact-line-blocking components in FinFET SRAM fabrication [patent_app_type] => utility [patent_app_number] => 16/206539 [patent_app_country] => US [patent_app_date] => 2018-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 39 [patent_no_of_words] => 12174 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16206539 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/206539
Using three or more masks to define contact-line-blocking components in FinFET SRAM fabrication Nov 29, 2018 Issued
Array ( [id] => 14413739 [patent_doc_number] => 20190172713 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-06 [patent_title] => LASER CRYSTALLIZING APPARATUS [patent_app_type] => utility [patent_app_number] => 16/204850 [patent_app_country] => US [patent_app_date] => 2018-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6613 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16204850 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/204850
Laser crystallizing apparatus Nov 28, 2018 Issued
Array ( [id] => 14558131 [patent_doc_number] => 10347536 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-09 [patent_title] => Semi-sequential 3D integration [patent_app_type] => utility [patent_app_number] => 16/203605 [patent_app_country] => US [patent_app_date] => 2018-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 16 [patent_no_of_words] => 7415 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16203605 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/203605
Semi-sequential 3D integration Nov 27, 2018 Issued
Array ( [id] => 14429597 [patent_doc_number] => 10319612 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-11 [patent_title] => Method for the rapid processing of polymer layers in support of imidization processes and fan out wafer level packaging including effiecient drying of precursor layers [patent_app_type] => utility [patent_app_number] => 16/174260 [patent_app_country] => US [patent_app_date] => 2018-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 5265 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16174260 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/174260
Method for the rapid processing of polymer layers in support of imidization processes and fan out wafer level packaging including effiecient drying of precursor layers Oct 28, 2018 Issued
Array ( [id] => 13847969 [patent_doc_number] => 20190027469 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-24 [patent_title] => Using Metal-Containing Layer to Reduce Carrier Shock in Package Formation [patent_app_type] => utility [patent_app_number] => 16/139660 [patent_app_country] => US [patent_app_date] => 2018-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5230 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16139660 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/139660
Using metal-containing layer to reduce carrier shock in package formation Sep 23, 2018 Issued
Array ( [id] => 13832385 [patent_doc_number] => 20190019677 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-17 [patent_title] => DEVICE AND METHOD FOR BONDING OF SUBSTRATES [patent_app_type] => utility [patent_app_number] => 16/123494 [patent_app_country] => US [patent_app_date] => 2018-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12089 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 29 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16123494 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/123494
Device and method for bonding of substates Sep 5, 2018 Issued
Array ( [id] => 13833771 [patent_doc_number] => 20190020370 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-17 [patent_title] => DISPLAY PANEL WITH TRANSPARENT CONDUCTOR BASED ISOLATOR AND METHOD FOR IMPROVED WIRELESS COMMUNICATIONS [patent_app_type] => utility [patent_app_number] => 16/119358 [patent_app_country] => US [patent_app_date] => 2018-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4141 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16119358 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/119358
Display panel with transparent conductor based isolator and method for improved wireless communications Aug 30, 2018 Issued
Array ( [id] => 14904781 [patent_doc_number] => 20190296156 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-26 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/111788 [patent_app_country] => US [patent_app_date] => 2018-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6934 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16111788 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/111788
Semiconductor device and method of manufacturing the same Aug 23, 2018 Issued
Array ( [id] => 15519705 [patent_doc_number] => 10566451 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-18 [patent_title] => Semiconductor device, semiconductor device manufacturing method, power supply circuit, and computer [patent_app_type] => utility [patent_app_number] => 16/111768 [patent_app_country] => US [patent_app_date] => 2018-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 25 [patent_no_of_words] => 8911 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16111768 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/111768
Semiconductor device, semiconductor device manufacturing method, power supply circuit, and computer Aug 23, 2018 Issued
Array ( [id] => 17033061 [patent_doc_number] => 11094881 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-17 [patent_title] => Chemical vapor deposition of perovskite thin films [patent_app_type] => utility [patent_app_number] => 16/111558 [patent_app_country] => US [patent_app_date] => 2018-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 66 [patent_no_of_words] => 13818 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 10 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16111558 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/111558
Chemical vapor deposition of perovskite thin films Aug 23, 2018 Issued
Array ( [id] => 16410100 [patent_doc_number] => 10818665 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-27 [patent_title] => Array of recessed access devices and an array of memory cells individually comprising a capacitor and a transistor [patent_app_type] => utility [patent_app_number] => 16/111781 [patent_app_country] => US [patent_app_date] => 2018-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 5313 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16111781 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/111781
Array of recessed access devices and an array of memory cells individually comprising a capacitor and a transistor Aug 23, 2018 Issued
Array ( [id] => 16409980 [patent_doc_number] => 10818544 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-27 [patent_title] => Method to enhance electrode adhesion stability [patent_app_type] => utility [patent_app_number] => 16/111605 [patent_app_country] => US [patent_app_date] => 2018-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 7107 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16111605 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/111605
Method to enhance electrode adhesion stability Aug 23, 2018 Issued
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