Search

Errol V. Fernandes

Examiner (ID: 15300, Phone: (571)270-7433 , Office: P/2894 )

Most Active Art Unit
2894
Art Unit(s)
2894, 2821, 2893
Total Applications
1197
Issued Applications
1012
Pending Applications
72
Abandoned Applications
130

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 13214793 [patent_doc_number] => 10121772 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-11-06 [patent_title] => Display apparatus [patent_app_type] => utility [patent_app_number] => 15/869090 [patent_app_country] => US [patent_app_date] => 2018-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4091 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15869090 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/869090
Display apparatus Jan 11, 2018 Issued
Array ( [id] => 14459831 [patent_doc_number] => 10325889 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-06-18 [patent_title] => Display device including LED devices with selective activation function [patent_app_type] => utility [patent_app_number] => 15/869094 [patent_app_country] => US [patent_app_date] => 2018-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 4094 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15869094 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/869094
Display device including LED devices with selective activation function Jan 11, 2018 Issued
Array ( [id] => 12717049 [patent_doc_number] => 20180130849 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-10 [patent_title] => INTEGRATED CIRCUIT WITH HALL EFFECT AND ANISOTROPIC MAGNETORESISTIVE (AMR) SENSORS [patent_app_type] => utility [patent_app_number] => 15/865825 [patent_app_country] => US [patent_app_date] => 2018-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10851 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15865825 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/865825
Integrated circuit with hall effect and anisotropic magnetoresistive (AMR) sensors Jan 8, 2018 Issued
Array ( [id] => 12778963 [patent_doc_number] => 20180151489 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-31 [patent_title] => METALLIC BLOCKING LAYER FOR RELIABLE INTERCONNECTS AND CONTACTS [patent_app_type] => utility [patent_app_number] => 15/864877 [patent_app_country] => US [patent_app_date] => 2018-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5057 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15864877 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/864877
Metallic blocking layer for reliable interconnects and contacts Jan 7, 2018 Issued
Array ( [id] => 13419981 [patent_doc_number] => 20180261533 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-09-13 [patent_title] => MOLDED BODY AND ELECTRICAL DEVICE HAVING A MOLDED BODY FOR HIGH VOLTAGE APPLICATIONS [patent_app_type] => utility [patent_app_number] => 15/864337 [patent_app_country] => US [patent_app_date] => 2018-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4751 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15864337 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/864337
Molded body and electrical device having a molded body for high voltage applications Jan 7, 2018 Issued
Array ( [id] => 14252703 [patent_doc_number] => 10276559 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-30 [patent_title] => System and method of fabricating ESD FinFET with improved metal landing in the drain [patent_app_type] => utility [patent_app_number] => 15/863536 [patent_app_country] => US [patent_app_date] => 2018-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 27 [patent_no_of_words] => 8362 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15863536 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/863536
System and method of fabricating ESD FinFET with improved metal landing in the drain Jan 4, 2018 Issued
Array ( [id] => 14079187 [patent_doc_number] => 20190088481 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-21 [patent_title] => CHIP HANDLING AND ELECTRONIC COMPONENT INTEGRATION [patent_app_type] => utility [patent_app_number] => 15/859608 [patent_app_country] => US [patent_app_date] => 2017-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18193 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15859608 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/859608
Chip handling and electronic component integration Dec 30, 2017 Issued
Array ( [id] => 13306621 [patent_doc_number] => 20180204847 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-07-19 [patent_title] => METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 15/858296 [patent_app_country] => US [patent_app_date] => 2017-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 23962 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 300 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15858296 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/858296
Method for manufacturing a semiconductor device Dec 28, 2017 Issued
Array ( [id] => 14177959 [patent_doc_number] => 10263001 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-16 [patent_title] => Method of forming semiconductor memory device [patent_app_type] => utility [patent_app_number] => 15/857626 [patent_app_country] => US [patent_app_date] => 2017-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4005 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15857626 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/857626
Method of forming semiconductor memory device Dec 28, 2017 Issued
Array ( [id] => 16339364 [patent_doc_number] => 10790333 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-29 [patent_title] => Flexible substrate for use with a perpendicular magnetic tunnel junction (PMTJ) [patent_app_type] => utility [patent_app_number] => 15/859074 [patent_app_country] => US [patent_app_date] => 2017-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 11969 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15859074 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/859074
Flexible substrate for use with a perpendicular magnetic tunnel junction (PMTJ) Dec 28, 2017 Issued
Array ( [id] => 16180432 [patent_doc_number] => 20200227401 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-16 [patent_title] => MICROELECTRONIC ASSEMBLIES [patent_app_type] => utility [patent_app_number] => 16/650499 [patent_app_country] => US [patent_app_date] => 2017-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20855 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16650499 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/650499
Microelectronic assemblies Dec 28, 2017 Issued
Array ( [id] => 14603699 [patent_doc_number] => 10355047 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-07-16 [patent_title] => Fabrication methods of forming annular vertical SI etched channel MOS devices [patent_app_type] => utility [patent_app_number] => 15/859222 [patent_app_country] => US [patent_app_date] => 2017-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 27 [patent_no_of_words] => 12839 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 239 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15859222 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/859222
Fabrication methods of forming annular vertical SI etched channel MOS devices Dec 28, 2017 Issued
Array ( [id] => 16356715 [patent_doc_number] => 10797233 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-06 [patent_title] => Methods of fabricating three-dimensional magnetic memory devices [patent_app_type] => utility [patent_app_number] => 15/858765 [patent_app_country] => US [patent_app_date] => 2017-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 43 [patent_no_of_words] => 23929 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15858765 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/858765
Methods of fabricating three-dimensional magnetic memory devices Dec 28, 2017 Issued
Array ( [id] => 17607171 [patent_doc_number] => 11335663 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-17 [patent_title] => Microelectronic assemblies [patent_app_type] => utility [patent_app_number] => 16/648354 [patent_app_country] => US [patent_app_date] => 2017-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 51 [patent_figures_cnt] => 57 [patent_no_of_words] => 20826 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16648354 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/648354
Microelectronic assemblies Dec 28, 2017 Issued
Array ( [id] => 14542963 [patent_doc_number] => 20190207103 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-04 [patent_title] => MAGNETIC TUNNEL JUNCTION (MTJ) FABRICATION METHODS AND SYSTEMS [patent_app_type] => utility [patent_app_number] => 15/859133 [patent_app_country] => US [patent_app_date] => 2017-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7545 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15859133 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/859133
Magnetic tunnel junction (MTJ) fabrication methods and systems Dec 28, 2017 Issued
Array ( [id] => 15791833 [patent_doc_number] => 10629649 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-21 [patent_title] => Method of making a three dimensional perpendicular magnetic tunnel junction with thin-film transistor [patent_app_type] => utility [patent_app_number] => 15/859070 [patent_app_country] => US [patent_app_date] => 2017-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 22 [patent_no_of_words] => 10560 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 266 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15859070 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/859070
Method of making a three dimensional perpendicular magnetic tunnel junction with thin-film transistor Dec 28, 2017 Issued
Array ( [id] => 14558697 [patent_doc_number] => 10347822 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-07-09 [patent_title] => Fabrication methods of forming cylindrical vertical SI etched channel 3D switching devices [patent_app_type] => utility [patent_app_number] => 15/857358 [patent_app_country] => US [patent_app_date] => 2017-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 26 [patent_no_of_words] => 11943 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15857358 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/857358
Fabrication methods of forming cylindrical vertical SI etched channel 3D switching devices Dec 27, 2017 Issued
Array ( [id] => 14542921 [patent_doc_number] => 20190207082 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-04 [patent_title] => PROCESS FOR CREATING DENSE PILLARS USING MULTIPLE EXPOSURES FOR MRAM FABRICATION [patent_app_type] => utility [patent_app_number] => 15/857382 [patent_app_country] => US [patent_app_date] => 2017-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3477 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15857382 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/857382
Process for creating dense pillars using multiple exposures for MRAM fabrication Dec 27, 2017 Issued
Array ( [id] => 14205053 [patent_doc_number] => 10269648 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-04-23 [patent_title] => Method of fabricating a semiconductor device structure [patent_app_type] => utility [patent_app_number] => 15/857381 [patent_app_country] => US [patent_app_date] => 2017-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 6407 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15857381 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/857381
Method of fabricating a semiconductor device structure Dec 27, 2017 Issued
Array ( [id] => 16650284 [patent_doc_number] => 10927449 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-23 [patent_title] => Extension of PVD chamber with multiple reaction gases, high bias power, and high power impulse source for deposition, implantation, and treatment [patent_app_type] => utility [patent_app_number] => 15/857384 [patent_app_country] => US [patent_app_date] => 2017-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 21 [patent_no_of_words] => 10355 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 274 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15857384 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/857384
Extension of PVD chamber with multiple reaction gases, high bias power, and high power impulse source for deposition, implantation, and treatment Dec 27, 2017 Issued
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