Search

Errol V. Fernandes

Examiner (ID: 15300, Phone: (571)270-7433 , Office: P/2894 )

Most Active Art Unit
2894
Art Unit(s)
2894, 2821, 2893
Total Applications
1197
Issued Applications
1012
Pending Applications
72
Abandoned Applications
130

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11367164 [patent_doc_number] => 20170005145 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-01-05 [patent_title] => 'LIGHT-EMITTING DEVICE, ELECTRONIC DEVICE, AND LIGHTING DEVICE' [patent_app_type] => utility [patent_app_number] => 15/263753 [patent_app_country] => US [patent_app_date] => 2016-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 24801 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15263753 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/263753
Light-emitting device, electronic device, and lighting device Sep 12, 2016 Issued
Array ( [id] => 11925561 [patent_doc_number] => 09793150 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-17 [patent_title] => 'Method for manufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 15/254623 [patent_app_country] => US [patent_app_date] => 2016-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 108 [patent_no_of_words] => 44029 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15254623 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/254623
Method for manufacturing semiconductor device Aug 31, 2016 Issued
Array ( [id] => 11564758 [patent_doc_number] => 09627353 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-04-18 [patent_title] => 'Method of manufacturing a semiconductor package' [patent_app_type] => utility [patent_app_number] => 15/240534 [patent_app_country] => US [patent_app_date] => 2016-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 6326 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15240534 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/240534
Method of manufacturing a semiconductor package Aug 17, 2016 Issued
Array ( [id] => 14397701 [patent_doc_number] => 10312141 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-04 [patent_title] => Preclean methodology for superconductor interconnect fabrication [patent_app_type] => utility [patent_app_number] => 15/238394 [patent_app_country] => US [patent_app_date] => 2016-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 3157 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15238394 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/238394
Preclean methodology for superconductor interconnect fabrication Aug 15, 2016 Issued
Array ( [id] => 15250247 [patent_doc_number] => 10510652 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-12-17 [patent_title] => Method of manufacturing semiconductor device [patent_app_type] => utility [patent_app_number] => 15/237410 [patent_app_country] => US [patent_app_date] => 2016-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 24 [patent_no_of_words] => 5811 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15237410 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/237410
Method of manufacturing semiconductor device Aug 14, 2016 Issued
Array ( [id] => 12187972 [patent_doc_number] => 20180046908 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-15 [patent_title] => 'HIGH MEMORY BANDWIDTH NEUROMORPHIC COMPUTING SYSTEM' [patent_app_type] => utility [patent_app_number] => 15/237459 [patent_app_country] => US [patent_app_date] => 2016-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5382 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15237459 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/237459
High memory bandwidth neuromorphic computing system Aug 14, 2016 Issued
Array ( [id] => 12109044 [patent_doc_number] => 09865532 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-01-09 [patent_title] => 'Molded body and electrical device having a molded body for high voltage applications' [patent_app_type] => utility [patent_app_number] => 15/229556 [patent_app_country] => US [patent_app_date] => 2016-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 32 [patent_no_of_words] => 4792 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15229556 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/229556
Molded body and electrical device having a molded body for high voltage applications Aug 4, 2016 Issued
Array ( [id] => 11564633 [patent_doc_number] => 09627228 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-04-18 [patent_title] => 'Method for manufacturing a chip package having a coating layer' [patent_app_type] => utility [patent_app_number] => 15/226930 [patent_app_country] => US [patent_app_date] => 2016-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 27 [patent_no_of_words] => 6495 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15226930 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/226930
Method for manufacturing a chip package having a coating layer Aug 2, 2016 Issued
Array ( [id] => 11599876 [patent_doc_number] => 09647054 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-05-09 [patent_title] => 'Inductor system and method' [patent_app_type] => utility [patent_app_number] => 15/225344 [patent_app_country] => US [patent_app_date] => 2016-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 30 [patent_no_of_words] => 6141 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 18 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15225344 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/225344
Inductor system and method Jul 31, 2016 Issued
Array ( [id] => 12162450 [patent_doc_number] => 20180033716 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-01 [patent_title] => 'SINTERED MULTILAYER HEAT SINKS FOR MICROELECTRONIC PACKAGES AND METHODS FOR THE PRODUCTION THEREOF' [patent_app_type] => utility [patent_app_number] => 15/223307 [patent_app_country] => US [patent_app_date] => 2016-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 9641 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15223307 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/223307
Sintered multilayer heat sinks for microelectronic packages and methods for the production thereof Jul 28, 2016 Issued
Array ( [id] => 12162517 [patent_doc_number] => 20180033782 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-01 [patent_title] => 'USING METAL-CONTAINING LAYER TO REDUCE CARRIER SHOCK IN PACKAGE FORMATION' [patent_app_type] => utility [patent_app_number] => 15/223862 [patent_app_country] => US [patent_app_date] => 2016-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 5285 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15223862 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/223862
Using metal-containing layer to reduce carrier shock in package formation Jul 28, 2016 Issued
Array ( [id] => 11831892 [patent_doc_number] => 09728641 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-08-08 [patent_title] => 'Semiconductor device and fabrication method thereof' [patent_app_type] => utility [patent_app_number] => 15/223597 [patent_app_country] => US [patent_app_date] => 2016-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5529 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15223597 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/223597
Semiconductor device and fabrication method thereof Jul 28, 2016 Issued
Array ( [id] => 11360201 [patent_doc_number] => 09536857 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-01-03 [patent_title] => 'Heating header of semiconductor mounting apparatus and bonding method for semiconductor' [patent_app_type] => utility [patent_app_number] => 15/209846 [patent_app_country] => US [patent_app_date] => 2016-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 16 [patent_no_of_words] => 5310 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15209846 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/209846
Heating header of semiconductor mounting apparatus and bonding method for semiconductor Jul 13, 2016 Issued
Array ( [id] => 11639798 [patent_doc_number] => 09661794 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-05-23 [patent_title] => 'Method of manufacturing package structure' [patent_app_type] => utility [patent_app_number] => 15/208627 [patent_app_country] => US [patent_app_date] => 2016-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 21 [patent_no_of_words] => 4921 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15208627 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/208627
Method of manufacturing package structure Jul 12, 2016 Issued
Array ( [id] => 11125525 [patent_doc_number] => 20160322499 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-03 [patent_title] => 'SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 15/209103 [patent_app_country] => US [patent_app_date] => 2016-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5218 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15209103 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/209103
Semiconductor device and fabrication method thereof Jul 12, 2016 Issued
Array ( [id] => 11439287 [patent_doc_number] => 20170040308 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-02-09 [patent_title] => 'METHOD OF MANUFACTURING A SEMICONDUCTOR PACKAGE' [patent_app_type] => utility [patent_app_number] => 15/207496 [patent_app_country] => US [patent_app_date] => 2016-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4672 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15207496 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/207496
Method of manufacturing a semiconductor package Jul 10, 2016 Issued
Array ( [id] => 13271061 [patent_doc_number] => 10147617 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-04 [patent_title] => Method for the rapid processing of polymer layers in support of imidization processes and fan out wafer level packaging including efficient drying of precursor layers [patent_app_type] => utility [patent_app_number] => 15/206318 [patent_app_country] => US [patent_app_date] => 2016-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 5255 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15206318 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/206318
Method for the rapid processing of polymer layers in support of imidization processes and fan out wafer level packaging including efficient drying of precursor layers Jul 10, 2016 Issued
Array ( [id] => 12174898 [patent_doc_number] => 09893046 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-02-13 [patent_title] => 'Thinning process using metal-assisted chemical etching' [patent_app_type] => utility [patent_app_number] => 15/205238 [patent_app_country] => US [patent_app_date] => 2016-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 5582 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15205238 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/205238
Thinning process using metal-assisted chemical etching Jul 7, 2016 Issued
Array ( [id] => 12129190 [patent_doc_number] => 20180012776 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-11 [patent_title] => 'VACUUM ASSISTED SEALING PROCESSES & SYSTEMS FOR INCREASING AIR CAVITY PACKAGE MANUFACTURING RATES' [patent_app_type] => utility [patent_app_number] => 15/203732 [patent_app_country] => US [patent_app_date] => 2016-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5645 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15203732 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/203732
Vacuum assisted sealing processes and systems for increasing air cavity package manufacturing rates Jul 5, 2016 Issued
Array ( [id] => 11385878 [patent_doc_number] => 20170011934 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-01-12 [patent_title] => 'FABRICATING PROCESS FOR REDISTRIBUTION LAYER' [patent_app_type] => utility [patent_app_number] => 15/200135 [patent_app_country] => US [patent_app_date] => 2016-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 1046 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15200135 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/200135
FABRICATING PROCESS FOR REDISTRIBUTION LAYER Jun 30, 2016 Abandoned
Menu