Search

Errol V. Fernandes

Examiner (ID: 15300, Phone: (571)270-7433 , Office: P/2894 )

Most Active Art Unit
2894
Art Unit(s)
2894, 2821, 2893
Total Applications
1197
Issued Applications
1012
Pending Applications
72
Abandoned Applications
130

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 13769993 [patent_doc_number] => 10177347 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-01-08 [patent_title] => Method for manufacturing display device [patent_app_type] => utility [patent_app_number] => 15/740843 [patent_app_country] => US [patent_app_date] => 2016-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 30 [patent_no_of_words] => 12010 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 411 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15740843 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/740843
Method for manufacturing display device Jun 30, 2016 Issued
Array ( [id] => 17700240 [patent_doc_number] => 11373974 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-06-28 [patent_title] => Electronic device packages and methods for maximizing electrical current to dies and minimizing bond finger size [patent_app_type] => utility [patent_app_number] => 16/306879 [patent_app_country] => US [patent_app_date] => 2016-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 7295 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16306879 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/306879
Electronic device packages and methods for maximizing electrical current to dies and minimizing bond finger size Jun 30, 2016 Issued
Array ( [id] => 16364642 [patent_doc_number] => 20200321393 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-08 [patent_title] => CROSS-POINT MAGNETIC RANDOM ACCESS MEMORY WITH PIEZOELECTRIC SELECTOR [patent_app_type] => utility [patent_app_number] => 16/305370 [patent_app_country] => US [patent_app_date] => 2016-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10451 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16305370 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/305370
Cross-point magnetic random access memory with piezoelectric selector Jun 27, 2016 Issued
Array ( [id] => 11891004 [patent_doc_number] => 09761570 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-09-12 [patent_title] => 'Electronic component package with multple electronic components' [patent_app_type] => utility [patent_app_number] => 15/195175 [patent_app_country] => US [patent_app_date] => 2016-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 20 [patent_no_of_words] => 5564 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 296 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15195175 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/195175
Electronic component package with multple electronic components Jun 27, 2016 Issued
Array ( [id] => 11876416 [patent_doc_number] => 09748197 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-08-29 [patent_title] => 'Methods for packaging integrated circuits' [patent_app_type] => utility [patent_app_number] => 15/192760 [patent_app_country] => US [patent_app_date] => 2016-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 36 [patent_no_of_words] => 4011 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15192760 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/192760
Methods for packaging integrated circuits Jun 23, 2016 Issued
Array ( [id] => 11253028 [patent_doc_number] => 09478539 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-10-25 [patent_title] => 'Compound semiconductor device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 15/189683 [patent_app_country] => US [patent_app_date] => 2016-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 28 [patent_no_of_words] => 9426 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15189683 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/189683
Compound semiconductor device and method of manufacturing the same Jun 21, 2016 Issued
Array ( [id] => 12376083 [patent_doc_number] => 09960255 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-05-01 [patent_title] => Method for manufacturing thin film transistor [patent_app_type] => utility [patent_app_number] => 15/128112 [patent_app_country] => US [patent_app_date] => 2016-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 18 [patent_no_of_words] => 3764 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15128112 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/128112
Method for manufacturing thin film transistor Jun 11, 2016 Issued
Array ( [id] => 11286466 [patent_doc_number] => 09502325 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-11-22 [patent_title] => 'Integrated circuit barrierless microfluidic channel' [patent_app_type] => utility [patent_app_number] => 15/158664 [patent_app_country] => US [patent_app_date] => 2016-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5738 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15158664 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/158664
Integrated circuit barrierless microfluidic channel May 18, 2016 Issued
Array ( [id] => 11539402 [patent_doc_number] => 09613817 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-04-04 [patent_title] => 'Method of enhancing surface doping concentration of source/drain regions' [patent_app_type] => utility [patent_app_number] => 15/138311 [patent_app_country] => US [patent_app_date] => 2016-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 6541 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 275 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15138311 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/138311
Method of enhancing surface doping concentration of source/drain regions Apr 25, 2016 Issued
Array ( [id] => 13682691 [patent_doc_number] => 20160380082 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-29 [patent_title] => METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 15/138234 [patent_app_country] => US [patent_app_date] => 2016-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7614 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15138234 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/138234
Method of manufacturing semiconductor device Apr 25, 2016 Issued
Array ( [id] => 11118170 [patent_doc_number] => 20160315143 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-27 [patent_title] => 'METHOD FOR FABRICATING AN IMPROVED FIELD EFFECT DEVICE' [patent_app_type] => utility [patent_app_number] => 15/137103 [patent_app_country] => US [patent_app_date] => 2016-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 6727 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15137103 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/137103
Method for fabricating an improved field effect device Apr 24, 2016 Issued
Array ( [id] => 11453417 [patent_doc_number] => 09577069 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-02-21 [patent_title] => 'Method of fabricating semiconductor MOS device' [patent_app_type] => utility [patent_app_number] => 15/136982 [patent_app_country] => US [patent_app_date] => 2016-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2086 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15136982 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/136982
Method of fabricating semiconductor MOS device Apr 23, 2016 Issued
Array ( [id] => 11360137 [patent_doc_number] => 09536793 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-01-03 [patent_title] => 'Self-aligned gate-first VFETs using a gate spacer recess' [patent_app_type] => utility [patent_app_number] => 15/135917 [patent_app_country] => US [patent_app_date] => 2016-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 2347 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15135917 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/135917
Self-aligned gate-first VFETs using a gate spacer recess Apr 21, 2016 Issued
Array ( [id] => 11328410 [patent_doc_number] => 20160359021 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-08 [patent_title] => 'SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/134556 [patent_app_country] => US [patent_app_date] => 2016-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 40 [patent_no_of_words] => 16382 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15134556 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/134556
Semiconductor devices and methods of manufacturing the same Apr 20, 2016 Issued
Array ( [id] => 11687284 [patent_doc_number] => 09685334 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-06-20 [patent_title] => 'Methods of forming semiconductor fin with carbon dopant for diffusion control' [patent_app_type] => utility [patent_app_number] => 15/134917 [patent_app_country] => US [patent_app_date] => 2016-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 4970 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15134917 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/134917
Methods of forming semiconductor fin with carbon dopant for diffusion control Apr 20, 2016 Issued
Array ( [id] => 11890971 [patent_doc_number] => 09761536 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-09-12 [patent_title] => 'Angle referenced lead frame design' [patent_app_type] => utility [patent_app_number] => 15/133375 [patent_app_country] => US [patent_app_date] => 2016-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 2024 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15133375 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/133375
Angle referenced lead frame design Apr 19, 2016 Issued
Array ( [id] => 11117989 [patent_doc_number] => 20160314963 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-27 [patent_title] => 'METHOD OF FORMING THIN FILM AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 15/133548 [patent_app_country] => US [patent_app_date] => 2016-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 11420 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15133548 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/133548
Method of forming thin film and method of manufacturing semiconductor device Apr 19, 2016 Issued
Array ( [id] => 11328341 [patent_doc_number] => 20160358953 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-08 [patent_title] => 'MANUFACTURING METHOD OF ARRAY SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 15/133737 [patent_app_country] => US [patent_app_date] => 2016-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3434 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15133737 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/133737
Manufacturing method of array substrate Apr 19, 2016 Issued
Array ( [id] => 11883842 [patent_doc_number] => 09755026 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-09-05 [patent_title] => 'Method of manufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 15/132800 [patent_app_country] => US [patent_app_date] => 2016-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 26 [patent_no_of_words] => 11072 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15132800 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/132800
Method of manufacturing semiconductor device Apr 18, 2016 Issued
Array ( [id] => 11111050 [patent_doc_number] => 20160308020 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-20 [patent_title] => 'FABRICATING LARGE AREA MULTI-TIER NANOSTRUCTURES' [patent_app_type] => utility [patent_app_number] => 15/133007 [patent_app_country] => US [patent_app_date] => 2016-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 35 [patent_no_of_words] => 10248 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15133007 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/133007
Fabricating large area multi-tier nanostructures Apr 18, 2016 Issued
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