Search

Errol V. Fernandes

Examiner (ID: 15300, Phone: (571)270-7433 , Office: P/2894 )

Most Active Art Unit
2894
Art Unit(s)
2894, 2821, 2893
Total Applications
1197
Issued Applications
1012
Pending Applications
72
Abandoned Applications
130

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10740807 [patent_doc_number] => 20160086959 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-24 [patent_title] => 'STRUCTURE AND METHOD FOR MANUFACTURE OF MEMORY DEVICE WITH THIN SILICON BODY' [patent_app_type] => utility [patent_app_number] => 14/935483 [patent_app_country] => US [patent_app_date] => 2015-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 6716 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14935483 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/935483
Structure and method for manufacture of memory device with thin silicon body Nov 8, 2015 Issued
Array ( [id] => 11925694 [patent_doc_number] => 09793282 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-17 [patent_title] => 'Floating gate memory cells in vertical memory' [patent_app_type] => utility [patent_app_number] => 14/925589 [patent_app_country] => US [patent_app_date] => 2015-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 57 [patent_no_of_words] => 10426 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14925589 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/925589
Floating gate memory cells in vertical memory Oct 27, 2015 Issued
Array ( [id] => 11925694 [patent_doc_number] => 09793282 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-17 [patent_title] => 'Floating gate memory cells in vertical memory' [patent_app_type] => utility [patent_app_number] => 14/925589 [patent_app_country] => US [patent_app_date] => 2015-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 57 [patent_no_of_words] => 10426 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14925589 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/925589
Floating gate memory cells in vertical memory Oct 27, 2015 Issued
Array ( [id] => 11925694 [patent_doc_number] => 09793282 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-17 [patent_title] => 'Floating gate memory cells in vertical memory' [patent_app_type] => utility [patent_app_number] => 14/925589 [patent_app_country] => US [patent_app_date] => 2015-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 57 [patent_no_of_words] => 10426 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14925589 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/925589
Floating gate memory cells in vertical memory Oct 27, 2015 Issued
Array ( [id] => 11925694 [patent_doc_number] => 09793282 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-17 [patent_title] => 'Floating gate memory cells in vertical memory' [patent_app_type] => utility [patent_app_number] => 14/925589 [patent_app_country] => US [patent_app_date] => 2015-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 57 [patent_no_of_words] => 10426 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14925589 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/925589
Floating gate memory cells in vertical memory Oct 27, 2015 Issued
Array ( [id] => 10518742 [patent_doc_number] => 09245796 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-01-26 [patent_title] => 'Methods of fabricating interconnection structures' [patent_app_type] => utility [patent_app_number] => 14/925821 [patent_app_country] => US [patent_app_date] => 2015-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 71 [patent_figures_cnt] => 98 [patent_no_of_words] => 13743 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14925821 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/925821
Methods of fabricating interconnection structures Oct 27, 2015 Issued
Array ( [id] => 10993367 [patent_doc_number] => 20160190313 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-30 [patent_title] => 'LOCAL BURIED CHANNEL DIELECTRIC FOR VERTICAL NAND PERFORMANCE ENHANCEMENT AND VERTICAL SCALING' [patent_app_type] => utility [patent_app_number] => 14/884210 [patent_app_country] => US [patent_app_date] => 2015-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 6546 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14884210 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/884210
Local buried channel dielectric for vertical NAND performance enhancement and vertical scaling Oct 14, 2015 Issued
Array ( [id] => 10689445 [patent_doc_number] => 20160035591 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-02-04 [patent_title] => 'Methods and Apparatus for bump-on-trace Chip Packaging' [patent_app_type] => utility [patent_app_number] => 14/883375 [patent_app_country] => US [patent_app_date] => 2015-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5642 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14883375 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/883375
Methods and apparatus for bump-on-trace chip packaging Oct 13, 2015 Issued
Array ( [id] => 10583873 [patent_doc_number] => 09306000 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-04-05 [patent_title] => 'Semiconductor device, method of manufacturing the same, and power module' [patent_app_type] => utility [patent_app_number] => 14/876795 [patent_app_country] => US [patent_app_date] => 2015-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 10989 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14876795 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/876795
Semiconductor device, method of manufacturing the same, and power module Oct 5, 2015 Issued
Array ( [id] => 15520547 [patent_doc_number] => 10566879 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-18 [patent_title] => Electronic device [patent_app_type] => utility [patent_app_number] => 15/563011 [patent_app_country] => US [patent_app_date] => 2015-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 49 [patent_no_of_words] => 34700 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 318 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15563011 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/563011
Electronic device Sep 13, 2015 Issued
Array ( [id] => 13201863 [patent_doc_number] => 10115854 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-30 [patent_title] => Method for forming a virtual germanium substrate using a laser [patent_app_type] => utility [patent_app_number] => 15/508975 [patent_app_country] => US [patent_app_date] => 2015-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 3827 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15508975 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/508975
Method for forming a virtual germanium substrate using a laser Sep 3, 2015 Issued
Array ( [id] => 11959921 [patent_doc_number] => 20170264073 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-14 [patent_title] => 'METHOD OF PRODUCING A LASER CHIP' [patent_app_type] => utility [patent_app_number] => 15/509028 [patent_app_country] => US [patent_app_date] => 2015-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6623 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15509028 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/509028
Method of producing a laser chip Aug 26, 2015 Issued
Array ( [id] => 10617886 [patent_doc_number] => 09337338 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-10 [patent_title] => 'Tucked active region without dummy poly for performance boost and variation reduction' [patent_app_type] => utility [patent_app_number] => 14/820938 [patent_app_country] => US [patent_app_date] => 2015-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 8090 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14820938 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/820938
Tucked active region without dummy poly for performance boost and variation reduction Aug 6, 2015 Issued
Array ( [id] => 11239926 [patent_doc_number] => 09466571 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-10-11 [patent_title] => 'Systems and methods for high-speed, low-profile memory packages and pinout designs' [patent_app_type] => utility [patent_app_number] => 14/802750 [patent_app_country] => US [patent_app_date] => 2015-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 7041 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14802750 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/802750
Systems and methods for high-speed, low-profile memory packages and pinout designs Jul 16, 2015 Issued
Array ( [id] => 11932719 [patent_doc_number] => 09799723 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-24 [patent_title] => 'Semiconductor device and method for forming same' [patent_app_type] => utility [patent_app_number] => 14/797787 [patent_app_country] => US [patent_app_date] => 2015-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 8613 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14797787 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/797787
Semiconductor device and method for forming same Jul 12, 2015 Issued
Array ( [id] => 10408396 [patent_doc_number] => 20150293404 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-15 [patent_title] => 'METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/749962 [patent_app_country] => US [patent_app_date] => 2015-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 40 [patent_no_of_words] => 44039 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14749962 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/749962
Method for manufacturing semiconductor device Jun 24, 2015 Issued
Array ( [id] => 10151934 [patent_doc_number] => 09184231 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-10 [patent_title] => 'Semiconductor device, method of manufacturing the same, and power module' [patent_app_type] => utility [patent_app_number] => 14/739061 [patent_app_country] => US [patent_app_date] => 2015-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 10958 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 244 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14739061 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/739061
Semiconductor device, method of manufacturing the same, and power module Jun 14, 2015 Issued
Array ( [id] => 11678452 [patent_doc_number] => 09676968 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-06-13 [patent_title] => 'Heat-resistant adhesive sheet for semiconductor inspection and semiconductor inspection method' [patent_app_type] => utility [patent_app_number] => 15/310315 [patent_app_country] => US [patent_app_date] => 2015-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6718 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15310315 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/310315
Heat-resistant adhesive sheet for semiconductor inspection and semiconductor inspection method May 10, 2015 Issued
Array ( [id] => 10158573 [patent_doc_number] => 09190357 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-17 [patent_title] => 'Multi chip package, manufacturing method thereof, and memory system having the multi chip package' [patent_app_type] => utility [patent_app_number] => 14/705416 [patent_app_country] => US [patent_app_date] => 2015-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 4463 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14705416 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/705416
Multi chip package, manufacturing method thereof, and memory system having the multi chip package May 5, 2015 Issued
Array ( [id] => 10426239 [patent_doc_number] => 20150311250 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-29 [patent_title] => 'Light-Emitting Device, Electronic Device, and Lighting Device' [patent_app_type] => utility [patent_app_number] => 14/694165 [patent_app_country] => US [patent_app_date] => 2015-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 24783 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14694165 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/694165
Light-emitting device, electronic device, and lighting device Apr 22, 2015 Issued
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