
Esaw T. Abraham
Examiner (ID: 14236)
| Most Active Art Unit | 2112 |
| Art Unit(s) | 2112, 2784, 2133 |
| Total Applications | 1844 |
| Issued Applications | 1647 |
| Pending Applications | 115 |
| Abandoned Applications | 105 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 20603702
[patent_doc_number] => 20260081716
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2026-03-19
[patent_title] => METHODS FOR ENHANCED MULTIPLEXING IN WIRELESS SYSTEMS
[patent_app_type] => utility
[patent_app_number] => 19/402157
[patent_app_country] => US
[patent_app_date] => 2025-11-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11360
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 147
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19402157
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/402157 | METHODS FOR ENHANCED MULTIPLEXING IN WIRELESS SYSTEMS | Nov 25, 2025 | Pending |
Array
(
[id] => 20152040
[patent_doc_number] => 20250251878
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-08-07
[patent_title] => QUASI-VOLATILE MEMORY DEVICE WITH A BACK-CHANNEL USAGE
[patent_app_type] => utility
[patent_app_number] => 19/061812
[patent_app_country] => US
[patent_app_date] => 2025-02-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7191
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -14
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19061812
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/061812 | QUASI-VOLATILE MEMORY DEVICE WITH A BACK-CHANNEL USAGE | Feb 23, 2025 | Pending |
Array
(
[id] => 20052078
[patent_doc_number] => 20250190300
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-06-12
[patent_title] => Efficient Networking for a Distributed Storage System
[patent_app_type] => utility
[patent_app_number] => 19/057177
[patent_app_country] => US
[patent_app_date] => 2025-02-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2607
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19057177
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/057177 | Efficient Networking for a Distributed Storage System | Feb 18, 2025 | Pending |
Array
(
[id] => 20019341
[patent_doc_number] => 20250157563
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-05-15
[patent_title] => DEFECTIVE MEMORY UNIT SCREENING IN A MEMORY SYSTEM
[patent_app_type] => utility
[patent_app_number] => 19/025675
[patent_app_country] => US
[patent_app_date] => 2025-01-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2305
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 32
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19025675
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/025675 | DEFECTIVE MEMORY UNIT SCREENING IN A MEMORY SYSTEM | Jan 15, 2025 | Pending |
Array
(
[id] => 20011997
[patent_doc_number] => 20250150219
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-05-08
[patent_title] => NETWORK ENTITY ASSISTED DECODING FOR REPETITION-BASED TRANSMISSIONS
[patent_app_type] => utility
[patent_app_number] => 19/018587
[patent_app_country] => US
[patent_app_date] => 2025-01-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 28645
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19018587
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/018587 | NETWORK ENTITY ASSISTED DECODING FOR REPETITION-BASED TRANSMISSIONS | Jan 12, 2025 | Pending |
Array
(
[id] => 20036974
[patent_doc_number] => 20250175196
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-05-29
[patent_title] => OBFUSCATING DATA IN DISTRIBUTED DATA STORAGE SYSTEMS AND NETWORK COMMUNICATIONS
[patent_app_type] => utility
[patent_app_number] => 19/007273
[patent_app_country] => US
[patent_app_date] => 2024-12-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11710
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -22
[patent_words_short_claim] => 6
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19007273
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/007273 | OBFUSCATING DATA IN DISTRIBUTED DATA STORAGE SYSTEMS AND NETWORK COMMUNICATIONS | Dec 30, 2024 | Pending |
Array
(
[id] => 20680498
[patent_doc_number] => 20260119319
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2026-04-30
[patent_title] => DATA CORRECTION SCHEME WITH REDUCED DEVICE OVERHEAD
[patent_app_type] => utility
[patent_app_number] => 19/003712
[patent_app_country] => US
[patent_app_date] => 2024-12-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11251
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19003712
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/003712 | DATA CORRECTION SCHEME WITH REDUCED DEVICE OVERHEAD | Dec 26, 2024 | Pending |
Array
(
[id] => 19992664
[patent_doc_number] => 20250130886
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-04-24
[patent_title] => MEMORY FAULT HANDLING METHOD AND APPARATUS
[patent_app_type] => utility
[patent_app_number] => 19/001218
[patent_app_country] => US
[patent_app_date] => 2024-12-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12236
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 66
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19001218
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/001218 | MEMORY FAULT HANDLING METHOD AND APPARATUS | Dec 23, 2024 | Pending |
Array
(
[id] => 20073031
[patent_doc_number] => 20250211253
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-06-26
[patent_title] => DECODERS, DECODING METHODS, MEMORY CONTROLLERS AND MEMORY SYSTEMS
[patent_app_type] => utility
[patent_app_number] => 18/981250
[patent_app_country] => US
[patent_app_date] => 2024-12-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9003
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18981250
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/981250 | DECODERS, DECODING METHODS, MEMORY CONTROLLERS AND MEMORY SYSTEMS | Dec 12, 2024 | Pending |
Array
(
[id] => 19864645
[patent_doc_number] => 20250103431
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-03-27
[patent_title] => PERIPHERAL COMPONENT INTERCONNECT EXPRESS INTERFACE DEVICE AND SYSTEM INCLUDING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/976352
[patent_app_country] => US
[patent_app_date] => 2024-12-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6994
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 65
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18976352
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/976352 | PERIPHERAL COMPONENT INTERCONNECT EXPRESS INTERFACE DEVICE AND SYSTEM INCLUDING THE SAME | Dec 10, 2024 | Pending |
Array
(
[id] => 20070726
[patent_doc_number] => 20250208948
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-06-26
[patent_title] => DATA CORRUPTION INDICATION
[patent_app_type] => utility
[patent_app_number] => 18/973325
[patent_app_country] => US
[patent_app_date] => 2024-12-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5667
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 91
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18973325
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/973325 | DATA CORRUPTION INDICATION | Dec 8, 2024 | Pending |
Array
(
[id] => 20011876
[patent_doc_number] => 20250150098
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-05-08
[patent_title] => COMMUNICATION DEVICE WITH INTERLEAVED ENCODING FOR FEC ENCODED DATA STREAMS
[patent_app_type] => utility
[patent_app_number] => 18/969450
[patent_app_country] => US
[patent_app_date] => 2024-12-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 1238
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18969450
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/969450 | COMMUNICATION DEVICE WITH INTERLEAVED ENCODING FOR FEC ENCODED DATA STREAMS | Dec 4, 2024 | Pending |
Array
(
[id] => 19850416
[patent_doc_number] => 20250095767
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-03-20
[patent_title] => NON-VOLATILE MEMORY AND MEMORY SYSTEM
[patent_app_type] => utility
[patent_app_number] => 18/970707
[patent_app_country] => US
[patent_app_date] => 2024-12-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 18039
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 245
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18970707
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/970707 | NON-VOLATILE MEMORY AND MEMORY SYSTEM | Dec 4, 2024 | Pending |
Array
(
[id] => 19851468
[patent_doc_number] => 20250096819
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-03-20
[patent_title] => METHOD AND APPARATUS FOR RECEIVING PPDU IN WHICH DATA IS DUPLICATED IN WIRELESS LAN SYSTEM
[patent_app_type] => utility
[patent_app_number] => 18/968856
[patent_app_country] => US
[patent_app_date] => 2024-12-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 22218
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 144
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18968856
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/968856 | METHOD AND APPARATUS FOR RECEIVING PPDU IN WHICH DATA IS DUPLICATED IN WIRELESS LAN SYSTEM | Dec 3, 2024 | Pending |
Array
(
[id] => 19848729
[patent_doc_number] => 20250094080
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-03-20
[patent_title] => NON-VOLATILE MEMORY MODULE ARCHITECTURE TO SUPPORT MEMORY ERROR CORRECTION
[patent_app_type] => utility
[patent_app_number] => 18/959106
[patent_app_country] => US
[patent_app_date] => 2024-11-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7891
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 75
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18959106
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/959106 | NON-VOLATILE MEMORY MODULE ARCHITECTURE TO SUPPORT MEMORY ERROR CORRECTION | Nov 24, 2024 | Pending |
Array
(
[id] => 20775256
[patent_doc_number] => 12658942
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-06-16
[patent_title] => Decoder scheme capable of reducing frequency of memory reading and writing during iterative decoding procedure
[patent_app_type] => utility
[patent_app_number] => 18/959533
[patent_app_country] => US
[patent_app_date] => 2024-11-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 1066
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 301
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18959533
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/959533 | Decoder scheme capable of reducing frequency of memory reading and writing during iterative decoding procedure | Nov 24, 2024 | Issued |
Array
(
[id] => 20045698
[patent_doc_number] => 20250183920
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-06-05
[patent_title] => BYTE ERROR CORRECTION
[patent_app_type] => utility
[patent_app_number] => 18/958072
[patent_app_country] => US
[patent_app_date] => 2024-11-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 29088
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 128
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18958072
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/958072 | BYTE ERROR CORRECTION | Nov 24, 2024 | Pending |
Array
(
[id] => 19803034
[patent_doc_number] => 20250068959
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-02-27
[patent_title] => RAPID MULTI-LEVEL QUBIT RESET
[patent_app_type] => utility
[patent_app_number] => 18/941942
[patent_app_country] => US
[patent_app_date] => 2024-11-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10397
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 186
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18941942
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/941942 | RAPID MULTI-LEVEL QUBIT RESET | Nov 7, 2024 | Pending |
Array
(
[id] => 19803753
[patent_doc_number] => 20250069678
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-02-27
[patent_title] => BUILT-IN SELF TEST CIRCUIT FOR SEGMENTED STATIC RANDOM ACCESS MEMORY (SRAM) ARRAY INPUT/OUTPUT
[patent_app_type] => utility
[patent_app_number] => 18/939751
[patent_app_country] => US
[patent_app_date] => 2024-11-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6863
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -26
[patent_words_short_claim] => 189
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18939751
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/939751 | BUILT-IN SELF TEST CIRCUIT FOR SEGMENTED STATIC RANDOM ACCESS MEMORY (SRAM) ARRAY INPUT/OUTPUT | Nov 6, 2024 | Pending |
Array
(
[id] => 19787343
[patent_doc_number] => 20250061022
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-02-20
[patent_title] => FLASH MEMORY APPARATUS AND STORAGE MANAGEMENT METHOD FOR FLASH MEMORY
[patent_app_type] => utility
[patent_app_number] => 18/939475
[patent_app_country] => US
[patent_app_date] => 2024-11-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 16890
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 208
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18939475
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/939475 | FLASH MEMORY APPARATUS AND STORAGE MANAGEMENT METHOD FOR FLASH MEMORY | Nov 5, 2024 | Pending |