Search

Esaw T. Abraham

Examiner (ID: 18736, Phone: (571)272-3812 , Office: P/2112 )

Most Active Art Unit
2112
Art Unit(s)
2133, 2112, 2784
Total Applications
1849
Issued Applications
1647
Pending Applications
120
Abandoned Applications
105

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19121956 [patent_doc_number] => 11965931 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-04-23 [patent_title] => Dummy dual in-line memory module (DIMM) testing system based on boundary scan interconnect and method thereof [patent_app_type] => utility [patent_app_number] => 18/064067 [patent_app_country] => US [patent_app_date] => 2022-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5125 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 304 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18064067 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/064067
Dummy dual in-line memory module (DIMM) testing system based on boundary scan interconnect and method thereof Dec 8, 2022 Issued
Array ( [id] => 19260695 [patent_doc_number] => 12020760 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-25 [patent_title] => ATPG testing method for latch based memories, for area reduction [patent_app_type] => utility [patent_app_number] => 18/078714 [patent_app_country] => US [patent_app_date] => 2022-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 9747 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18078714 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/078714
ATPG testing method for latch based memories, for area reduction Dec 8, 2022 Issued
Array ( [id] => 18408686 [patent_doc_number] => 20230170039 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-01 [patent_title] => BUFFER CIRCUIT WITH ADAPTIVE REPAIR CAPABILITY [patent_app_type] => utility [patent_app_number] => 18/074188 [patent_app_country] => US [patent_app_date] => 2022-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5555 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18074188 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/074188
Buffer circuit with adaptive repair capability Dec 1, 2022 Issued
Array ( [id] => 19442864 [patent_doc_number] => 12093128 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-17 [patent_title] => Systems and methods for efficient error mitigation in quantum circuit execution using parity checks and classical feedback [patent_app_type] => utility [patent_app_number] => 18/060235 [patent_app_country] => US [patent_app_date] => 2022-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5417 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18060235 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/060235
Systems and methods for efficient error mitigation in quantum circuit execution using parity checks and classical feedback Nov 29, 2022 Issued
Array ( [id] => 18253300 [patent_doc_number] => 20230080339 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-16 [patent_title] => METHOD, MEMORY CONTROLLER, AND MEMORY SYSTEM FOR READING DATA STORED IN FLASH MEMORY [patent_app_type] => utility [patent_app_number] => 17/991799 [patent_app_country] => US [patent_app_date] => 2022-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14556 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17991799 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/991799
Method, memory controller, and memory system for reading data stored in flash memory Nov 20, 2022 Issued
Array ( [id] => 20775392 [patent_doc_number] => 12659078 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-06-16 [patent_title] => Communication apparatus, communication method, and communication system [patent_app_type] => utility [patent_app_number] => 18/714444 [patent_app_country] => US [patent_app_date] => 2022-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 19 [patent_no_of_words] => 18972 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18714444 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/714444
Communication apparatus, communication method, and communication system Nov 17, 2022 Issued
Array ( [id] => 19295087 [patent_doc_number] => 12034457 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-09 [patent_title] => Memory, memory module, memory system, and operation method of memory system [patent_app_type] => utility [patent_app_number] => 17/986968 [patent_app_country] => US [patent_app_date] => 2022-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 7763 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17986968 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/986968
Memory, memory module, memory system, and operation method of memory system Nov 14, 2022 Issued
Array ( [id] => 18999707 [patent_doc_number] => 11916570 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-02-27 [patent_title] => Codeword format for data storage [patent_app_type] => utility [patent_app_number] => 17/985361 [patent_app_country] => US [patent_app_date] => 2022-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8526 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17985361 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/985361
Codeword format for data storage Nov 10, 2022 Issued
Array ( [id] => 18165433 [patent_doc_number] => 20230032032 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-02 [patent_title] => FLASH MEMORY APPARATUS AND STORAGE MANAGEMENT METHOD FOR FLASH MEMORY [patent_app_type] => utility [patent_app_number] => 17/963999 [patent_app_country] => US [patent_app_date] => 2022-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16808 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17963999 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/963999
Flash memory apparatus and storage management method for flash memory Oct 10, 2022 Issued
Array ( [id] => 18148832 [patent_doc_number] => 20230022689 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-26 [patent_title] => Efficient Networking for a Distributed Storage System [patent_app_type] => utility [patent_app_number] => 17/958480 [patent_app_country] => US [patent_app_date] => 2022-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8247 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17958480 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/958480
Efficient networking for a distributed storage system Oct 2, 2022 Issued
Array ( [id] => 18346886 [patent_doc_number] => 20230134996 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-04 [patent_title] => NON-VOLATILE MEMORY MODULE ARCHITECTURE TO SUPPORT MEMORY ERROR CORRECTION [patent_app_type] => utility [patent_app_number] => 17/958915 [patent_app_country] => US [patent_app_date] => 2022-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7848 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17958915 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/958915
Non-volatile memory module architecture to support memory error correction Oct 2, 2022 Issued
Array ( [id] => 18281958 [patent_doc_number] => 20230097430 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-30 [patent_title] => DATA TRANSMISSION DEVICE AND IMAGE PROCESSING APPARATUS CAPABLE OF SUPPRESSING REDUCTION IN IMAGE QUALITY OF IMAGE DATA TO BE TRANSMITTED [patent_app_type] => utility [patent_app_number] => 17/936313 [patent_app_country] => US [patent_app_date] => 2022-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3940 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -2 [patent_words_short_claim] => 232 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17936313 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/936313
DATA TRANSMISSION DEVICE AND IMAGE PROCESSING APPARATUS CAPABLE OF SUPPRESSING REDUCTION IN IMAGE QUALITY OF IMAGE DATA TO BE TRANSMITTED Sep 27, 2022 Abandoned
Array ( [id] => 18913540 [patent_doc_number] => 11876535 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-01-16 [patent_title] => Memory controller and method for controlling data in decoding pipeline [patent_app_type] => utility [patent_app_number] => 17/933190 [patent_app_country] => US [patent_app_date] => 2022-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 8582 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17933190 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/933190
Memory controller and method for controlling data in decoding pipeline Sep 18, 2022 Issued
Array ( [id] => 19295085 [patent_doc_number] => 12034455 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-09 [patent_title] => Iteration dependent bitwise bit flipping decoder [patent_app_type] => utility [patent_app_number] => 17/947635 [patent_app_country] => US [patent_app_date] => 2022-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5621 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17947635 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/947635
Iteration dependent bitwise bit flipping decoder Sep 18, 2022 Issued
Array ( [id] => 19329398 [patent_doc_number] => 12047093 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-23 [patent_title] => Bit flipping decoder using channel information [patent_app_type] => utility [patent_app_number] => 17/940878 [patent_app_country] => US [patent_app_date] => 2022-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6539 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17940878 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/940878
Bit flipping decoder using channel information Sep 7, 2022 Issued
Array ( [id] => 20029694 [patent_doc_number] => 20250167916 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-22 [patent_title] => METHOD AND TRANSMITTER FOR TRANSMITTING DATA USING CONSTELLATION [patent_app_type] => utility [patent_app_number] => 18/843624 [patent_app_country] => US [patent_app_date] => 2022-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2194 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18843624 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/843624
METHOD AND TRANSMITTER FOR TRANSMITTING DATA USING CONSTELLATION Sep 1, 2022 Pending
Array ( [id] => 19080045 [patent_doc_number] => 11949430 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-02 [patent_title] => Parallel system to calculate low density parity check [patent_app_type] => utility [patent_app_number] => 17/901126 [patent_app_country] => US [patent_app_date] => 2022-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 17 [patent_no_of_words] => 10059 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17901126 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/901126
Parallel system to calculate low density parity check Aug 31, 2022 Issued
Array ( [id] => 18968121 [patent_doc_number] => 11901913 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-02-13 [patent_title] => Error correction coding apparatus and error correction decoding apparatus [patent_app_type] => utility [patent_app_number] => 17/899719 [patent_app_country] => US [patent_app_date] => 2022-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 21 [patent_no_of_words] => 11043 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17899719 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/899719
Error correction coding apparatus and error correction decoding apparatus Aug 30, 2022 Issued
Array ( [id] => 19005954 [patent_doc_number] => 20240070025 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-29 [patent_title] => APPARATUSES, SYSTEMS, AND METHODS FOR MODULE LEVEL ERROR CORRECTION [patent_app_type] => utility [patent_app_number] => 17/822915 [patent_app_country] => US [patent_app_date] => 2022-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18077 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17822915 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/822915
Apparatuses, systems, and methods for module level error correction Aug 28, 2022 Issued
Array ( [id] => 19244966 [patent_doc_number] => 12015424 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-18 [patent_title] => Network-based hyperdimensional system [patent_app_type] => utility [patent_app_number] => 17/895177 [patent_app_country] => US [patent_app_date] => 2022-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 24 [patent_no_of_words] => 10330 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17895177 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/895177
Network-based hyperdimensional system Aug 24, 2022 Issued
Menu