Esaw T. Abraham

Array ( [id] => 20775256 [patent_doc_number] => 12658942 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-06-16 [patent_title] => Decoder scheme capable of reducing frequency of memory reading and writing during iterative decoding procedure [patent_app_type] => utility [patent_app_number] => 18/959533 [patent_app_country] => US [patent_app_date] => 2024-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 1066 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 301 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18959533 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19803034 [patent_doc_number] => 20250068959 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-27 [patent_title] => RAPID MULTI-LEVEL QUBIT RESET [patent_app_type] => utility [patent_app_number] => 18/941942 [patent_app_country] => US [patent_app_date] => 2024-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10397 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18941942 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19803753 [patent_doc_number] => 20250069678 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-27 [patent_title] => BUILT-IN SELF TEST CIRCUIT FOR SEGMENTED STATIC RANDOM ACCESS MEMORY (SRAM) ARRAY INPUT/OUTPUT [patent_app_type] => utility [patent_app_number] => 18/939751 [patent_app_country] => US [patent_app_date] => 2024-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6863 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18939751 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19787343 [patent_doc_number] => 20250061022 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-20 [patent_title] => FLASH MEMORY APPARATUS AND STORAGE MANAGEMENT METHOD FOR FLASH MEMORY [patent_app_type] => utility [patent_app_number] => 18/939475 [patent_app_country] => US [patent_app_date] => 2024-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16890 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18939475 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20000720 [patent_doc_number] => 20250138942 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-01 [patent_title] => STORAGE DEVICE, MEDIA INTERFACE DEVICE OF THE STORAGE DEVICE, AND OPERATING METHOD OF THE MEDIA INTERFACE DEVICE [patent_app_type] => utility [patent_app_number] => 18/930513 [patent_app_country] => US [patent_app_date] => 2024-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7961 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18930513 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20680497 [patent_doc_number] => 20260119318 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-04-30 [patent_title] => REGULATED BLOCK FOLDING FOR MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 18/930556 [patent_app_country] => US [patent_app_date] => 2024-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2379 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18930556 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19756594 [patent_doc_number] => 20250045159 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-06 [patent_title] => METHOD, MEMORY CONTROLLER, AND MEMORY SYSTEM FOR READING DATA STORED IN FLASH MEMORY [patent_app_type] => utility [patent_app_number] => 18/926329 [patent_app_country] => US [patent_app_date] => 2024-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14585 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18926329 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19749217 [patent_doc_number] => 20250037782 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-30 [patent_title] => ADDRESS FAULT DETECTION [patent_app_type] => utility [patent_app_number] => 18/918743 [patent_app_country] => US [patent_app_date] => 2024-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19921 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18918743 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20310621 [patent_doc_number] => 20250328250 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-23 [patent_title] => FLASH MEMORY CONTROLLER AND FLASH MEMORY ACCESS METHOD [patent_app_type] => utility [patent_app_number] => 18/901733 [patent_app_country] => US [patent_app_date] => 2024-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3266 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18901733 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20629292 [patent_doc_number] => 20260093578 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-04-02 [patent_title] => DATA PROCESSING [patent_app_type] => utility [patent_app_number] => 18/899342 [patent_app_country] => US [patent_app_date] => 2024-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9567 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18899342 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19834265 [patent_doc_number] => 20250086051 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-13 [patent_title] => MEMORY REPAIR METHOD AND APPARATUS BASED ON ERROR CODE TRACKING [patent_app_type] => utility [patent_app_number] => 18/892991 [patent_app_country] => US [patent_app_date] => 2024-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5085 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18892991 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20367128 [patent_doc_number] => 20250356940 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-11-20 [patent_title] => MEMORY SYSTEM, ELECTRONIC PRODUCT AND OPERATING METHOD OF MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 18/886660 [patent_app_country] => US [patent_app_date] => 2024-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6188 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18886660 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19694991 [patent_doc_number] => 20250013536 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-09 [patent_title] => Dynamically encoding parameters for writing a plurality of data segments [patent_app_type] => utility [patent_app_number] => 18/884542 [patent_app_country] => US [patent_app_date] => 2024-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 60081 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18884542 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19836419 [patent_doc_number] => 20250088205 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-13 [patent_title] => Error Correction Device and Method for Correcting a Data Block [patent_app_type] => utility [patent_app_number] => 18/882947 [patent_app_country] => US [patent_app_date] => 2024-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7737 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 298 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18882947 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20805159 [patent_doc_number] => 12670066 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-06-30 [patent_title] => Abnormal program sequence detection [patent_app_type] => utility [patent_app_number] => 18/829788 [patent_app_country] => US [patent_app_date] => 2024-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9635 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18829788 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20570604 [patent_doc_number] => 20260064528 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-03-05 [patent_title] => DETECTING DIE FAILURE IN MEMORY SUB-SYSTEMS [patent_app_type] => utility [patent_app_number] => 18/823116 [patent_app_country] => US [patent_app_date] => 2024-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2215 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18823116 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20759277 [patent_doc_number] => 12652061 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-06-09 [patent_title] => Memory system that performs error correction using metric array and method of controlling the same [patent_app_type] => utility [patent_app_number] => 18/821531 [patent_app_country] => US [patent_app_date] => 2024-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 30 [patent_no_of_words] => 13463 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18821531 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20570602 [patent_doc_number] => 20260064526 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-03-05 [patent_title] => MEMORY DEVICE BAD COLUMN IDENTIFICATION AND COMPENSATION [patent_app_type] => utility [patent_app_number] => 18/817007 [patent_app_country] => US [patent_app_date] => 2024-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4966 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18817007 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20557051 [patent_doc_number] => 20260056837 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-02-26 [patent_title] => SELECTIVE CODEWORD MEDIA SCAN SYSTEM [patent_app_type] => utility [patent_app_number] => 18/812552 [patent_app_country] => US [patent_app_date] => 2024-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3655 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18812552 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20667931 [patent_doc_number] => 12609716 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-04-21 [patent_title] => On-the-fly CRC calculation for a horizontal layered LDPC decoder [patent_app_type] => utility [patent_app_number] => 18/810430 [patent_app_country] => US [patent_app_date] => 2024-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3591 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18810430 [rel_patent_id] =>[rel_patent_doc_number] =>)