
Esaw T. Abraham
Examiner (ID: 18736, Phone: (571)272-3812 , Office: P/2112 )
| Most Active Art Unit | 2112 |
| Art Unit(s) | 2133, 2112, 2784 |
| Total Applications | 1849 |
| Issued Applications | 1647 |
| Pending Applications | 120 |
| Abandoned Applications | 105 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 19629858
[patent_doc_number] => 20240408307
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-12-12
[patent_title] => CRC Interleaving Pattern for Polar Codes
[patent_app_type] => utility
[patent_app_number] => 18/608154
[patent_app_country] => US
[patent_app_date] => 2024-03-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 40271
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -20
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18608154
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/608154 | CRC interleaving pattern for polar codes | Mar 17, 2024 | Issued |
Array
(
[id] => 20403547
[patent_doc_number] => 12493520
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-12-09
[patent_title] => Memory system generating error correction code parity based on rank
[patent_app_type] => utility
[patent_app_number] => 18/604940
[patent_app_country] => US
[patent_app_date] => 2024-03-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 22
[patent_no_of_words] => 5860
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 170
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18604940
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/604940 | Memory system generating error correction code parity based on rank | Mar 13, 2024 | Issued |
Array
(
[id] => 20011873
[patent_doc_number] => 20250150095
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-05-08
[patent_title] => APPARATUS AND METHOD FOR POWER REDUCTION IN A BIT FLIPPING DECODER
[patent_app_type] => utility
[patent_app_number] => 18/603215
[patent_app_country] => US
[patent_app_date] => 2024-03-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10352
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 80
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18603215
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/603215 | APPARATUS AND METHOD FOR POWER REDUCTION IN A BIT FLIPPING DECODER | Mar 12, 2024 | Pending |
Array
(
[id] => 19267646
[patent_doc_number] => 20240211349
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-06-27
[patent_title] => Trait Based Storage Unit Groups
[patent_app_type] => utility
[patent_app_number] => 18/601224
[patent_app_country] => US
[patent_app_date] => 2024-03-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 33026
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18601224
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/601224 | Trait based storage unit groups | Mar 10, 2024 | Issued |
Array
(
[id] => 19452423
[patent_doc_number] => 20240312553
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-09-19
[patent_title] => APPARATUSES, SYSTEMS, AND METHODS FOR STORING ERROR INFORMATION AND PROVIDING RECOMMENDATIONS BASED ON SAME
[patent_app_type] => utility
[patent_app_number] => 18/598832
[patent_app_country] => US
[patent_app_date] => 2024-03-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13177
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 159
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18598832
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/598832 | Apparatuses, systems, and methods for storing error information and providing recommendations based on same | Mar 6, 2024 | Issued |
Array
(
[id] => 19336269
[patent_doc_number] => 20240250699
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-07-25
[patent_title] => MANAGING ERROR CONTROL INFORMATION USING A REGISTER
[patent_app_type] => utility
[patent_app_number] => 18/594795
[patent_app_country] => US
[patent_app_date] => 2024-03-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 20737
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18594795
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/594795 | Managing error control information using a register | Mar 3, 2024 | Issued |
Array
(
[id] => 19385539
[patent_doc_number] => 20240275409
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-08-15
[patent_title] => DATA INTERLEAVING METHOD AND DATA INTERLEAVING APPARATUS
[patent_app_type] => utility
[patent_app_number] => 18/593519
[patent_app_country] => US
[patent_app_date] => 2024-03-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 57140
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 204
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18593519
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/593519 | Data interleaving method and data interleaving apparatus | Feb 29, 2024 | Issued |
Array
(
[id] => 19516580
[patent_doc_number] => 20240348266
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-10-17
[patent_title] => ENCODING DEVICE, ENCODING METHOD, DECODING DEVICE, DECODING METHOD, AND PROGRAM
[patent_app_type] => utility
[patent_app_number] => 18/585779
[patent_app_country] => US
[patent_app_date] => 2024-02-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 46269
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18585779
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/585779 | Encoding device, encoding method, decoding device, decoding method, and program | Feb 22, 2024 | Issued |
Array
(
[id] => 19334364
[patent_doc_number] => 20240248794
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-07-25
[patent_title] => DEVICE AND METHODS FOR MANAGING THE DATA INTEGRITY OF READ AND WRITE OPERATIONS
[patent_app_type] => utility
[patent_app_number] => 18/582524
[patent_app_country] => US
[patent_app_date] => 2024-02-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5705
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 140
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18582524
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/582524 | Device and methods for managing the data integrity of read and write operations | Feb 19, 2024 | Issued |
Array
(
[id] => 19334363
[patent_doc_number] => 20240248793
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-07-25
[patent_title] => SYSTEM AND METHODS FOR MANAGING THE DATA INTEGRITY OF READ AND WRITE OPERATIONS
[patent_app_type] => utility
[patent_app_number] => 18/582490
[patent_app_country] => US
[patent_app_date] => 2024-02-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7564
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 202
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18582490
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/582490 | System and methods for managing the data integrity of read and write operations | Feb 19, 2024 | Issued |
Array
(
[id] => 19407994
[patent_doc_number] => 20240291505
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-08-29
[patent_title] => PERFECTLY BALANCED ERROR CODE CORRECTION WITHOUT CORRECTION POWER INCREASE
[patent_app_type] => utility
[patent_app_number] => 18/443883
[patent_app_country] => US
[patent_app_date] => 2024-02-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7470
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 47
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18443883
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/443883 | PERFECTLY BALANCED ERROR CODE CORRECTION WITHOUT CORRECTION POWER INCREASE | Feb 15, 2024 | Pending |
Array
(
[id] => 19720885
[patent_doc_number] => 12206434
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2025-01-21
[patent_title] => Obfuscating data in distributed data storage systems and network communications
[patent_app_type] => utility
[patent_app_number] => 18/441267
[patent_app_country] => US
[patent_app_date] => 2024-02-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 28
[patent_figures_cnt] => 53
[patent_no_of_words] => 17055
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 171
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18441267
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/441267 | Obfuscating data in distributed data storage systems and network communications | Feb 13, 2024 | Issued |
Array
(
[id] => 19385537
[patent_doc_number] => 20240275407
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-08-15
[patent_title] => DETECTING A STALL CONDITION IN BIT FLIPPING DECODING USING SYNDROME WEIGHT SLOPE
[patent_app_type] => utility
[patent_app_number] => 18/438919
[patent_app_country] => US
[patent_app_date] => 2024-02-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6869
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 147
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18438919
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/438919 | Detecting a stall condition in bit flipping decoding using syndrome weight slope | Feb 11, 2024 | Issued |
Array
(
[id] => 19385538
[patent_doc_number] => 20240275408
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-08-15
[patent_title] => MEMORY SYSTEM, MEMORY CONTROLLER, AND METHOD OF CONTROLLING NON-VOLATILE MEMORY
[patent_app_type] => utility
[patent_app_number] => 18/439320
[patent_app_country] => US
[patent_app_date] => 2024-02-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7684
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 191
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18439320
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/439320 | Memory system, memory controller, and method of controlling non-volatile memory | Feb 11, 2024 | Issued |
Array
(
[id] => 20275448
[patent_doc_number] => 12445235
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-10-14
[patent_title] => Electronic device for updating frame error rate of link and operation method of electronic device
[patent_app_type] => utility
[patent_app_number] => 18/437158
[patent_app_country] => US
[patent_app_date] => 2024-02-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 8789
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18437158
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/437158 | Electronic device for updating frame error rate of link and operation method of electronic device | Feb 7, 2024 | Issued |
Array
(
[id] => 19336345
[patent_doc_number] => 20240250775
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-07-25
[patent_title] => METHODS FOR ENHANCED MULTIPLEXING IN WIRELESS SYSTEMS
[patent_app_type] => utility
[patent_app_number] => 18/427347
[patent_app_country] => US
[patent_app_date] => 2024-01-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 15502
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -2
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18427347
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/427347 | Methods for enhanced multiplexing in wireless systems | Jan 29, 2024 | Issued |
Array
(
[id] => 19365024
[patent_doc_number] => 20240267058
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-08-08
[patent_title] => Method for Transmitting a Check Vector From a Transmitter Unit to a Receiver Unit
[patent_app_type] => utility
[patent_app_number] => 18/423543
[patent_app_country] => US
[patent_app_date] => 2024-01-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9612
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 54
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18423543
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/423543 | Method for transmitting a check vector from a transmitter unit to a receiver unit | Jan 25, 2024 | Issued |
Array
(
[id] => 19927051
[patent_doc_number] => 12301352
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-05-13
[patent_title] => Multi-wire permuted forward error correction
[patent_app_type] => utility
[patent_app_number] => 18/416434
[patent_app_country] => US
[patent_app_date] => 2024-01-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 13
[patent_no_of_words] => 1165
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18416434
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/416434 | Multi-wire permuted forward error correction | Jan 17, 2024 | Issued |
Array
(
[id] => 20494196
[patent_doc_number] => 12536065
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-01-27
[patent_title] => Heterogenous interleaved Reed-Solomon (HetIRS) with erasure decoding
[patent_app_type] => utility
[patent_app_number] => 18/415626
[patent_app_country] => US
[patent_app_date] => 2024-01-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 5193
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 160
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18415626
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/415626 | Heterogenous interleaved Reed-Solomon (HetIRS) with erasure decoding | Jan 16, 2024 | Issued |
Array
(
[id] => 19162021
[patent_doc_number] => 20240154728
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-05-09
[patent_title] => REPORTING REDUNDANCY VERSION WITH FEEDBACK INFORMATION
[patent_app_type] => utility
[patent_app_number] => 18/414048
[patent_app_country] => US
[patent_app_date] => 2024-01-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 19490
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 75
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18414048
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/414048 | Reporting redundancy version with feedback information | Jan 15, 2024 | Issued |