Search

Esaw T. Abraham

Examiner (ID: 18736, Phone: (571)272-3812 , Office: P/2112 )

Most Active Art Unit
2112
Art Unit(s)
2133, 2112, 2784
Total Applications
1849
Issued Applications
1647
Pending Applications
120
Abandoned Applications
105

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19972905 [patent_doc_number] => 12341530 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2025-06-24 [patent_title] => Check node updates in bit flipping decoders [patent_app_type] => utility [patent_app_number] => 18/391223 [patent_app_country] => US [patent_app_date] => 2023-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 7007 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18391223 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/391223
Check node updates in bit flipping decoders Dec 19, 2023 Issued
Array ( [id] => 19950248 [patent_doc_number] => 12321613 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-03 [patent_title] => Bit flipping decoder with optimized maximum iterations for varied bit flipping thresholds [patent_app_type] => utility [patent_app_number] => 18/521574 [patent_app_country] => US [patent_app_date] => 2023-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2431 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18521574 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/521574
Bit flipping decoder with optimized maximum iterations for varied bit flipping thresholds Nov 27, 2023 Issued
Array ( [id] => 20029590 [patent_doc_number] => 20250167812 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-22 [patent_title] => SYSTEMS AND METHODS FOR DECODING CODEWORDS [patent_app_type] => utility [patent_app_number] => 18/512436 [patent_app_country] => US [patent_app_date] => 2023-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 34 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18512436 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/512436
Systems and methods for decoding codewords Nov 16, 2023 Issued
Array ( [id] => 19036467 [patent_doc_number] => 20240086282 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-14 [patent_title] => MULTI-LAYER CODE RATE ARCHITECTURE FOR COPYBACK BETWEEN PARTITIONS WITH DIFFERENT CODE RATES [patent_app_type] => utility [patent_app_number] => 18/511698 [patent_app_country] => US [patent_app_date] => 2023-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13100 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18511698 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/511698
Multi-layer code rate architecture for copyback between partitions with different code rates Nov 15, 2023 Issued
Array ( [id] => 19206964 [patent_doc_number] => 20240178863 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-30 [patent_title] => ERROR CORRECTION DEVICE AND ERROR CORRECTION METHOD [patent_app_type] => utility [patent_app_number] => 18/511740 [patent_app_country] => US [patent_app_date] => 2023-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10569 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18511740 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/511740
Error correction device and error correction method Nov 15, 2023 Issued
Array ( [id] => 19221255 [patent_doc_number] => 20240185959 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-06 [patent_title] => Nested Error Correction Codes for DNA Data Storage [patent_app_type] => utility [patent_app_number] => 18/499370 [patent_app_country] => US [patent_app_date] => 2023-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14107 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18499370 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/499370
Nested error correction codes for DNA data storage Oct 31, 2023 Issued
Array ( [id] => 19703261 [patent_doc_number] => 12197285 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-14 [patent_title] => Flash memory apparatus and storage management method for flash memory [patent_app_type] => utility [patent_app_number] => 18/498069 [patent_app_country] => US [patent_app_date] => 2023-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 16882 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18498069 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/498069
Flash memory apparatus and storage management method for flash memory Oct 30, 2023 Issued
Array ( [id] => 19858763 [patent_doc_number] => 12261624 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-25 [patent_title] => Error correction coding apparatus and error correction decoding apparatus [patent_app_type] => utility [patent_app_number] => 18/492547 [patent_app_country] => US [patent_app_date] => 2023-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 21 [patent_no_of_words] => 11077 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18492547 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/492547
Error correction coding apparatus and error correction decoding apparatus Oct 22, 2023 Issued
Array ( [id] => 19114725 [patent_doc_number] => 20240126475 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-18 [patent_title] => NON-VOLATILE MEMORY MODULE ARCHITECTURE TO SUPPORT MEMORY ERROR CORRECTION [patent_app_type] => utility [patent_app_number] => 18/490357 [patent_app_country] => US [patent_app_date] => 2023-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7870 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18490357 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/490357
Non-volatile memory module architecture to support memory error correction Oct 18, 2023 Issued
Array ( [id] => 20216591 [patent_doc_number] => 12413250 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-09 [patent_title] => Error correction with error code for a string of symbols [patent_app_type] => utility [patent_app_number] => 18/487267 [patent_app_country] => US [patent_app_date] => 2023-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 7535 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18487267 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/487267
Error correction with error code for a string of symbols Oct 15, 2023 Issued
Array ( [id] => 18941835 [patent_doc_number] => 20240036974 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-01 [patent_title] => METHOD, MEMORY CONTROLLER, AND MEMORY SYSTEM FOR READING DATA STORED IN FLASH MEMORY [patent_app_type] => utility [patent_app_number] => 18/379154 [patent_app_country] => US [patent_app_date] => 2023-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14571 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18379154 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/379154
Method, memory controller, and memory system for reading data stored in flash memory Oct 10, 2023 Issued
Array ( [id] => 19829285 [patent_doc_number] => 12250082 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-11 [patent_title] => Size indication for feedback signaling [patent_app_type] => utility [patent_app_number] => 18/480995 [patent_app_country] => US [patent_app_date] => 2023-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 13581 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18480995 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/480995
Size indication for feedback signaling Oct 3, 2023 Issued
Array ( [id] => 19662875 [patent_doc_number] => 20240429940 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-26 [patent_title] => DECODERS, DECODING METHODS, MEMORY CONTROLLERS AND MEMORY SYSTEMS [patent_app_type] => utility [patent_app_number] => 18/475024 [patent_app_country] => US [patent_app_date] => 2023-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14604 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 311 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18475024 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/475024
Decoders, decoding methods, memory controllers and memory systems Sep 25, 2023 Issued
Array ( [id] => 19718867 [patent_doc_number] => 12204404 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-21 [patent_title] => Electronic device having ECC decoder [patent_app_type] => utility [patent_app_number] => 18/467731 [patent_app_country] => US [patent_app_date] => 2023-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 8240 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18467731 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/467731
Electronic device having ECC decoder Sep 14, 2023 Issued
Array ( [id] => 19639914 [patent_doc_number] => 12170532 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-17 [patent_title] => Communication device with interleaved encoding for FEC encoded data streams [patent_app_type] => utility [patent_app_number] => 18/244880 [patent_app_country] => US [patent_app_date] => 2023-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6658 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18244880 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/244880
Communication device with interleaved encoding for FEC encoded data streams Sep 10, 2023 Issued
Array ( [id] => 20374471 [patent_doc_number] => 12481908 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-25 [patent_title] => Performing quantum error mitigation at runtime using trained machine learning model [patent_app_type] => utility [patent_app_number] => 18/243220 [patent_app_country] => US [patent_app_date] => 2023-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 9948 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18243220 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/243220
Performing quantum error mitigation at runtime using trained machine learning model Sep 6, 2023 Issued
Array ( [id] => 19906952 [patent_doc_number] => 12283973 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-22 [patent_title] => Methods and apparatus for constructing polar codes [patent_app_type] => utility [patent_app_number] => 18/461809 [patent_app_country] => US [patent_app_date] => 2023-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6803 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18461809 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/461809
Methods and apparatus for constructing polar codes Sep 5, 2023 Issued
Array ( [id] => 19819122 [patent_doc_number] => 20250077329 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-06 [patent_title] => RECLAMATION OF MEMORY ECC BITS FOR ERROR TOLERANT NUMBER FORMATS [patent_app_type] => utility [patent_app_number] => 18/241163 [patent_app_country] => US [patent_app_date] => 2023-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7332 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18241163 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/241163
Reclamation of memory ECC bits for error tolerant number formats Aug 30, 2023 Issued
Array ( [id] => 19933043 [patent_doc_number] => 12306246 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-20 [patent_title] => Partial chain reconfiguration for test time reduction [patent_app_type] => utility [patent_app_number] => 18/453045 [patent_app_country] => US [patent_app_date] => 2023-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 2409 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18453045 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/453045
Partial chain reconfiguration for test time reduction Aug 20, 2023 Issued
Array ( [id] => 18834571 [patent_doc_number] => 20230403098 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-14 [patent_title] => DATA ENCODING METHOD, DATA DECODING METHOD, AND RELATED DEVICE [patent_app_type] => utility [patent_app_number] => 18/452555 [patent_app_country] => US [patent_app_date] => 2023-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9370 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18452555 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/452555
Data encoding method, data decoding method, and related device Aug 19, 2023 Issued
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